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The NSI6000 Family -- Advances in Architecture and Hardware

IP.com Disclosure Number: IPCOM000131503D
Original Publication Date: 1982-Jun-01
Included in the Prior Art Database: 2005-Nov-11
Document File: 11 page(s) / 39K

Publishing Venue

Software Patent Institute

Related People

Subhash Bal: AUTHOR [+7]

Abstract

With the aid of features such as 32-bit architecture and slave processors, this group of microprocessors addresses a wide range of system applications. When LSI/MOS chips were first developed, it was possible for designers to place approximately 1000 active elements on a single chip. Now, ten years later, the number of active elements per chip has risen to over 100,000. As we enter the second decade of LSI/MOS technology, applications for its use are continually expanding as the computational power of newly developed 16- and 32-bit microprocessors approaches that of mainframe computers. In short, microprocessor designers have their work cut out for them. Currently, software development efforts are becoming responsible for ever larger shares of product development costs. To offset these costs, microcomputer designers are shifting toward high-level language programming. Increasingly, users expect microprocessors to provide a cost-effective solution for HLL support with minimal degradation in overall system performance; this sets tougher requirements for microprocessor designers.

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THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

This record contains textual material that is copyright ©; 1982 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Contact the IEEE Computer Society http://www.computer.org/ (714-821-8380) for copies of the complete work that was the source of this textual material and for all use beyond that as a record from the SPI Database.

The NSI6000 Family -- Advances in Architecture and Hardware

Subhash Bal, Asher Kaminker, Yonv Lavi, Abraham Menachem, Zvi Soha

National Semiconductor

With the aid of features such as 32-bit architecture and slave processors, this group of microprocessors addresses a wide range of system applications.

When LSI/MOS chips were first developed, it was possible for designers to place approximately 1000 active elements on a single chip. Now, ten years later, the number of active elements per chip has risen to over 100,000. As we enter the second decade of LSI/MOS technology, applications for its use are continually expanding as the computational power of newly developed 16- and 32-bit microprocessors approaches that of mainframe computers. In short, microprocessor designers have their work cut out for them.

Currently, software development efforts are becoming responsible for ever larger shares of product development costs. To offset these costs, microcomputer designers are shifting toward high-level language programming. Increasingly, users expect microprocessors to provide a cost- effective solution for HLL support with minimal degradation in overall system performance; this sets tougher requirements for microprocessor designers.

Sophisticated future systems will require a combination of capabilities. Anticipating these needs, National Semiconductor has developed the NS16000 microprocessor family to incorporate various architectural features into a new generation of devices. Utilizing National Semiconductor's XMOS technology, the design of the NS16000 family is implemented with 3.5- micron gate technology. This allows for a smaller die size, leading to a reduction in chip cost.

The design challenges in creating this new family were met only after thoroughly considering market requirements and LSI technology limitations. This article describes some of the capabilities provided by the NS16000 architecture.

Supporting system software

Operating system design can be simplified with built-in hardware features. The powerful NS16000 control in structions aid the implementation of efficient operating systems and of systems oriented to high-level languages. These NS16000 facilities include semaphores, traps, interrupts, supervisor calls, easy context switching, and procedure calls.

One feature of the NS16000 architecture is virtual memory support, which includes the instructions-abort facility. This facility allows an instruction to be reexecuted after it as been aborted due to an address fault (that is, virtual memory page fa...