Browse Prior Art Database

Cellular Logic Computers for Pattern Recognition Disclosure Number: IPCOM000131577D
Original Publication Date: 1983-Jan-01
Included in the Prior Art Database: 2005-Nov-11
Document File: 15 page(s) / 53K

Publishing Venue

Software Patent Institute

Related People

Kendall Preston, Jr.: AUTHOR [+3]


Carnegie-Mellon University and University of Pittsburgh

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 7% of the total text.

Page 1 of 15


This record contains textual material that is copyright ©; 1983 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Contact the IEEE Computer Society (714-821-8380) for copies of the complete work that was the source of this textual material and for all use beyond that as a record from the SPI Database.

Cellular Logic Computers for Pattern Recognition

Kendall Preston, Jr.,

Carnegie-Mellon University and University of Pittsburgh

The genealogy of cellular logic computers reveals an interesting diversity of architectures, but it took the IC technology of the seventies to significantly expand their Dractical aDDlications.

Cellular logic computers, under development since the 1950's, are now in use for image processing in hundreds of laboratories worldwide. This survey of cellular logic computer architectures for pattern processing in image analysis concentrates on recent efforts and examines some newer architectures that combine logical and numerical computations.

A logical (or "binary") image is one in which the value of each picture element is a single bit. Such images are black and white, and they are processed or modified by use of logical rather than numerical transforms. Boolean algebra provides the mathematics for such transforms. This does not mean that so-called "gray-level" images cannot be processed by the cellular logic computer, or CLC. Any gray-level image can be converted into a registered stack of binary images through multithresholding. After each member of the stack is processed logically, the stack can be returned to gray- level format by arithmetically summing the results. Whether the final output is generated faster or more economically by a CLC or by a computer system carrying out numerical computations depends upon (1) the number of binary images required in the stack, (2) the speed of thresholding, (3) the speed of the CLC itself, and (4) the speed of arithmetic recombination.

Logical processing often has advantages over more traditional numerical methods in that multilevel, recursive logical transforms followed by arithmetic recombination have certain unique properties with respect to

their use in image processing. Logical transforms can be considered as filters; many are constant phase, pass absolutely no signal beyond cutoff, and have a cutoff frequency that decreases inversely with the number of recursions.~ Furthermore, logical transforms, when executed as convolution functions using small (say, 3 x 3) kernels, can be executed at~ultra high speed (less than one nanosecond per convolution step) by doing all computations by table lookup and paralleling lookup tables as well as pipelining the computational steps.

Neighborhood functions

Cellular logic computers are used for the digital computation of two-dimensional and, more recently, threedimensional logical neighborhood functions in imag...