Browse Prior Art Database

Card Data Path Test

IP.com Disclosure Number: IPCOM000131676D
Original Publication Date: 2005-Dec-10
Included in the Prior Art Database: 2005-Dec-10
Document File: 3 page(s) / 49K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

The problem to be solved is to achieve good on-line data path testing of the hardware of a node in a switching network. While extensive tests are possible when the node is off-line, prior art on-line tests are very limited, and do not provide integrity tests for the data path throughout the port card and the switching fabric. Up to now, there are typically two types of tests, the Deep BIT (Built In Test) and the Periodic BIT. The Deep BIT is done during initialization. It is a comprehensive test, but it cannot be done when the node is on line. The Periodic BIT is invoked typically every few hundred milliseconds. It involves simple hardware tests, which do not involve the port cards, so as not to affect on line operation. Additionally, higher communication layers may include CRC (Cyclic Redundant Check) or other error detection codes. However, detection at this level will indicate that there is a problem in a path; the exact node in which the problem has occurred is not indicated.

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Card Data Path Test

Idea: Moshe Shaul, IL-Hod Hasharon; Adi Sapir, IL-Hod Hasharon; Udi Kashkash, IL-Hod

Hasharon; Evgeni Berenstein, IL-Hod Hasharon

The problem to be solved is to achieve good on-line data path testing of the hardware of a node in a switching network. While extensive tests are possible when the node is off-line, prior art on-line tests are very limited, and do not provide integrity tests for the data path throughout the port card and the switching fabric. Up to now, there are typically two types of tests, the Deep BIT (Built In Test) and the Periodic BIT. The Deep BIT is done during initialization. It is a comprehensive test, but it cannot be done when the node is on line. The Periodic BIT is invoked typically every few hundred milliseconds. It involves simple hardware tests, which do not involve the port cards, so as not to affect on line operation.

Additionally, higher communication layers may include CRC (Cyclic Redundant Check) or other error detection codes. However, detection at this level will indicate that there is a problem in a path; the exact node in which the problem has occurred is not indicated.

According to the new idea, an on-line test is added, which tests complete round paths through most of the hardware of the switching node, coupled with parts of the hardware of the neighboring nodes. These tests can be initiated periodically by user activation or automatically triggered when higher layer software signals that a problem has been detected. Figure 1 depicts an example for data flow of the idea in an ATM (Asynchronous Transfer Mode) network. To the left, there is the Originator Node. It comprises a control card, data fabric and service cards (ports). To the right, there is a Destination Node, which is similarly configured. A management CPU (Central Processing Unit; top left) manages the system, using SNMP (Simple Network Management Protocol) protocol for the configuration.

According to the idea, the Originator Node, when so configured (by the management CPU), generates a special test frame and sends it to a Destination Node. The Destination Node, which is also configured for this test by the management CPU, routes the incoming test frame back to the Originator node, using a different port. The Originator node compares the original frame to the incoming frame, and verifies that they are identically.

As illustrated in the figure, this test consists of a path through the following subunits:

* Starting from the MCP (Media Control Platform; control card) of the Originating Node

* Trough the switching fabric of the Originating Unit

* To Service (Port) Card A of the Originator Node

* Through an ATM media

* To Service Card B of the Destination Node

* To the switch fabric of the Destination Node

* Back to Service card B of the Destination Node (different port)

* Out to the ATM Media

* To Service card A (different port) of the Originating Node

* Again through the switching fabric of the Originating Node...