Browse Prior Art Database

Nano Second Resolution On-Chip Power Delivery Network Characterization Circuit

IP.com Disclosure Number: IPCOM000131680D
Publication Date: 2005-Nov-14
Document File: 4 page(s) / 31K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a new and efficient way to characterize the high-speed transient voltage fluctuations on an on-chip power supply. Benefits include a much finer resolution.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Nano Second Resolution On-Chip Power Delivery Network Characterization Circuit

Disclosed is a method for a new and efficient way to characterize the high-speed transient voltage fluctuations on an on-chip power supply. Benefits include a much finer resolution.

Background

In advanced microprocessors, the on-chip power grid supplies power to a number of large device drivers that, during turn-on and turn-off, create significant voltage fluctuations on the supply network. Consequently, there is a need to experimentally characterize these voltage fluctuations.

Currently, voltage-controlled oscillators and on-chip capacitors are used to characterize the transient response of an on-chip power supply grid to current switching.

General Description

The disclosed method characterizes the transient response of an on-chip power delivery network in the presence of large current switching activities. In the disclosed method, ring oscillators are placed at various locations on a realistic supply network to detect fluctuations. The output frequency of the ring oscillator must be linearly dependent on the supply voltage, and the measurement circuits must be supplied by a dedicated quiet supply.

As shown in Figure 1, an external clock, extclk, is used to time the experiments. At each positive edge of extclk, the ring oscillator enable signal is toggled. When the enable signal is high, the ring oscillator is running, otherwise it is disabled. The output of the ring oscillator is connected to a programmable counter. At settings Nd and Nc, the driver control and capture control signals are respectively enabled. The counter is reset by the ring oscillator enable signal. The counter circuit is important in capturing the same ring oscillator pulse during each extclk cycle. The timing of these control signals is shown in Figure 2.

When the ring oscillator is enabled and the external clock is in its high phase, the driver enable signal is set to high. The driver control signal is one of the outputs of the programmable counter. It is high when the programmed counter limit Nd is reached. When both driver enable and driver control signals are high, the drivers are turned on to produce a voltage droop on the power supply network under test. Otherwise, the drivers are turned off.

The counter can be programmed to capture the Ncth pulse generated by the ring oscillator. At each negative edge of the ring oscillator enable signal, the counter is reset. Output cacntl1 is set to 0 and cacntl2 is set to 1. At t...