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A High Performance Differential Amplifier

IP.com Disclosure Number: IPCOM000132126D
Publication Date: 2005-Dec-01
Document File: 6 page(s) / 94K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that advances an existing wide-range differential amplifier, offering increased current for improved gain and variation immunity.

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A High Performance Differential Amplifier

Disclosed is a method that advances an existing wide-range differential amplifier, offering increased current for improved gain and variation immunity.

Background

There is a need to produce more gain and/or less device variation sensitivity from the fixed collection of transistors acting as a certain differential amplifier. The very-wide common-mode-range differential amplifier (VCDA) features complementary differential pairs modulating the current (and switching threshold) in two generalized cascode inverters. One of the inverters has its input and output shorted, generating a bias voltage equal to its switching threshold. This voltage biases the differential pair current sources and drives the second inverter (see Figure 1). Ideally, the differential pair action causes equal and opposite threshold shifts in the two inverters, and the second inverter further amplifies (with opposite sign) the bias voltage shift to the output terminal.

The VCDA’s output cascode devices tend to be biased in the linear region, boosting output impedance (and voltage gain) at low frequencies. But this also results in a reduced output current, impeding the amplifier’s output switching at high frequencies. To improve high-frequency performance at the cost of low-frequency gain, the cascode biases can be reconnected as shown in Figure 2, producing the low-voltage self-biased complementary folded cascode (SBCFC). This increases |VG| for the cascode devices by VDson, increasing output conductance.

General Description

Figure 3 shows the disclosed method reconnecting the gates of the current sources that supply the differential pairs. These gate voltages are thereby increased by VGson in the same fashion that the SBCFC boosted the cascode voltages relative to the VCDA.  This results in greater differential pair current and a larger shift in the inverters’ switching threshold; this ultimately gives larger voltage excursions at the output for a given input excursion. The current source bias connection now forms a cascode “diode”, and the whole topology is referred to as a super-symmetric diode amplifier (SSDA).

Figure 4a shows a fully-differential version of the SSDA formed by two single-ended SSDAs connected in a complementary pair. The common mode of the resulting differential outputs can also be regulated by shorting the virtual supply nodes, as shown in Figure 4b. Assume for instance that both output voltages average greater than the amplifier’s input balance point (perhaps Vcc/2). The bias voltages must be below the balance point, reducing the NMOS current and increasing the PMOS current in the differential pairs. This increases both inverters’ threshold voltages upward equally, and the resulting bias voltage increase is converted into an output decre...