Browse Prior Art Database

Method for an enhanced CKE algorithm to eliminate low-performance asynchronous ODT transactions

IP.com Disclosure Number: IPCOM000132452D
Publication Date: 2005-Dec-16
Document File: 3 page(s) / 21K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for an enhanced clock enable (CKE) algorithm to eliminate low-performance asynchronous on-die termination (ODT) transactions. Benefits include improved functionality and improved performance.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 55% of the total text.

Method for an enhanced CKE algorithm to eliminate low-performance asynchronous ODT transactions

Disclosed is a method for an enhanced clock enable (CKE) algorithm to eliminate low-performance asynchronous on-die termination (ODT) transactions. Benefits include improved functionality and improved performance.

Background

              ODT is a technology that improves the electrical characteristics of the double data rate (DDR2) channel and is described in “DDR2 SDRAM Specification”, published by JEDEC as document #JESD-79-2B on January, 2005. The specification defines two types of ODT transactions, synchronous (sync) ODT transactions for active/standby mode and asynchronous (async) ODT transactions for power-down mode.

              Conventional DDR2 chipsets generate asynchronous (async) and synchronous (sync) ODT transactions, depending on the mode of the target rank. Async ODT transactions require a longer duration because the targeted rank is in power-down mode.

General description

              The disclosed method powers-up the ODT target rank in advance of the transaction so that the shorter-duration sync ODT timings can be performed.

              The key elements of the disclosed method include:

•             Look-ahead rules/algorithm to anticipate when to power up a target rank and prevent the existing power-down logic from activating

•             Look-ahead logic that implements the set of rules into hardware

•             Mode to disable the look-ahead logic in applications that prioritize power-savings rather than performance

Advantages

              The disclosed method provides advantages, including:
•             Improved functionality due to providing a CKE algorithm for DDR2 SDRAM control

•             Improved functionality due to providing improved DDR2 and DDR3 latencies and bandwidth

•             Improved performance due to eliminating low-performance asynchronous ODT transactions

•             Improved performance due to disabling the look-ahead logic in applications that prioritize power-savings rather than performance

Detailed description

              The disclosed method includes an algorithm that anticipates ODT requirements to a rank and initiates a power-down exit to enable the use of more efficient sync timings. Additionally, the algorithm prevents the premature pow...