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Method for early measurement of high-speed strip-line impedance circuitry

IP.com Disclosure Number: IPCOM000132648D
Publication Date: 2005-Dec-28
Document File: 2 page(s) / 52K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for early measurement of high-speed strip-line impedance circuitry. Benefits include improved functionality and improved performance.

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Method for early measurement of high-speed strip-line impedance circuitry

Disclosed is a method for early measurement of high-speed strip-line impedance circuitry. Benefits include improved functionality and improved performance.

Background

      A requirement exists to measure high-speed strip-line impedance features before the printed circuit board (PCB) is completed (while it is work in progress). Conventionally, strip-line impedances are measured as part of the final inspection (after the product has had 90% or greater of its labor, value, and lead time completed).

Description

              The disclosed method tests the strip-line impedance of a PCB earlier in the manufacturing process. The method enables quick feedback and can shorten manufacturing lead times and improve yield.

      With the disclosed method, strip-line impedance measurements reference the planes above and below the circuit. They do not require plated through holes or outer-layer circuitry. The method enables the measurement of strip-line impedances after the lamination process, provided the samples are correctly prepared.

              The disclosed method can be implemented using the following steps (see Figure 1):

1.   Process the PCB conventionally through the lamination process.

2.   After lamination, drill and countersink the PCB to expose internal features and provide access to impedance probe points.

3.   Probe impedances using a test probe, which mates with the countersunk hole.

4. ...