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Method for fine pattern formation on substrate cores for USFF packages

IP.com Disclosure Number: IPCOM000144750D
Publication Date: 2007-Jan-06
Document File: 2 page(s) / 88K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for fine pattern formation on substrate cores for ultra-small form factor (USFF) packages. Benefits include improved functionality, improved performance, and improved cost effectiveness.

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Method for fine pattern formation on substrate cores for USFF packages

Disclosed is a method for fine pattern formation on substrate cores for ultra-small form factor (USFF) packages. Benefits include improved functionality, improved performance, and improved cost effectiveness.

Background

      Ultra-small form factor (USFF) architecture with thin cores (~60 µm) is being actively pursued for low-power applications. This architecture, due to its lower-power requirements, does not require thick copper (Cu) layers in the core.

      Conventionally, a core with copper cladding is used as the starting material for a package. The Cu cladding is patterned using a subtractive etch or semi-subtractive process, which does not provide the capability to form fine features on the core. However, USFF packages require finer routing features in a lower-height space.

General description

      The disclosed method is fine pattern formation on substrate cores for USFF packages. The method uses of a semi-additive process on core material without copper cladding. As a result, finer features can be formed at the substrate core, enabling lower layer counts with higher routing capability. Furthermore, the elimination of thick copper cladding on the core is expected to increase the bit life for mechanical drilling of the core, resulting in significant cost savings.

      The key elements of the disclosed method include:

•     Incoming substrate core without a copper cladding

•     Semi-additive patterning for copper trace formation on the core layer

•     Finer features at the substrate core, enabling lower layer counts with higher routing ability

•     Increased drill bit life

•     Lowered layer count

Advantages

      The disclosed method provides advantages, including:
•     Improved functionality due to providing fine pattern formation on substrate cores for USFF packages

•     Improved functionality due to providing a lower...