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Method for a 3-D multiple-dice packaging with recessed-cavity substrates

IP.com Disclosure Number: IPCOM000144779D
Publication Date: 2007-Jan-06
Document File: 4 page(s) / 124K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a three-dimensional (3-D) multiple-dice packaging with recessed-cavity substrates. Benefits include improved functionality, improved performance, and improved design simplicity.

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Method for a 3-D multiple-dice packaging with recessed-cavity substrates

Disclosed is a method for a three-dimensional (3-D) multiple-dice packaging with recessed-cavity substrates. Benefits include improved functionality, improved performance, and improved design simplicity.

Background

      Electronics Industry continually demands increasing performance and functionality at an affordable cost. This problem is conventionally solved by integrating several functionality on to a chip (example: Static Random Access Memory (SRAM) in Central processing unit (CPU) chip). However this silicon level integration may not be cost-effective or not possible due to process incompatibility in many applications (integration of heterogeneous and diverse technologies).  For example Dynamic Random Memory (DRAM) or Radio Frequency (RF) device integrated in to a CPU chip.  In this context, Package can provide a cost effective vehicle for integrating chips with diverse technologies.    Conventionally, this integration using the package is accomplished on the surface of the package commonly referred to as 2D multiple-dice packaging (Figure 1). This comes with the penalty of increased package size and/or complexity and cost.

     

      The performance of the integrated product depends on the proximity of the individual components in the planar (x-y) package format. If the components are separated by a long distance in a package, the electrical performance degrades due to excessive signal propagation delay or voltage drop (important for improved power delivery applications).

      The performance can significantly improve if they can be integrated in the vertical (z) direction. To enable vertical component integration, recessed cavities in substrates are required. The implementation of recessed cavities in substrates provides significant integration and performance advantages for ceramic substrates, which have a coefficient of t...