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Method for measuring variations in PMOS and NMOS overlap capacitance

IP.com Disclosure Number: IPCOM000146541D
Publication Date: 2007-Feb-16
Document File: 4 page(s) / 36K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for measuring variations in positive-channel metal oxide semiconductor (PMOS) and negative-channel metal oxide semiconductor (NMOS) overlap capacitance. Benefits include improved functionality and an improved test environment.

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Method for measuring variations in PMOS and NMOS overlap capacitance

Disclosed is a method for measuring variations in positive-channel metal oxide semiconductor (PMOS) and negative-channel metal oxide semiconductor (NMOS) overlap capacitance. Benefits include improved functionality and an improved test environment.

Background

      Overlap capacitance (Cov) can affect the function of circuits significantly. Variation of Cov can occur in PMOS and NMOS transistors. Die-to-die variations can be measured using testing structures. However, no measurement is available for variations within a die.

      Oscillator frequency variation is conventionally identified using a ring oscillator comprised of an odd number of inverters connected in a chain. The oscillator frequency depends on the load at the output of each inverter and on the current each inverter supplies. For a typical oscillator, the load consists of gate and interconnect capacitance along with the overlap capacitance. As a result, variations in a basic oscillator frequency provide convoluted information about variations in the capacitance (see Figure 1).

General description

      The disclosed method is the measurement of variations in PMOS and NMOS overlap capacitance. The method uses a pair of closely located oscillators, a Cov reference oscillator and a Cov oscillator. The load difference between the pair of oscillators is proportional to the amount of overlap capacitance.

Advantages

      The disclosed method provides advantages, including:
•     Improved functionality due to providing measurement of variation in overlap capacitance
•     Improved test environment due to enabling Cov variations within a die to be measured

Detailed description

      The disclosed method measures variations in P...