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Hierarchical Associative Memories for Parallel Computation

IP.com Disclosure Number: IPCOM000149014D
Original Publication Date: 1970-May-31
Included in the Prior Art Database: 2007-Mar-30

Publishing Venue

Software Patent Institute

Related People

Gertz, Jeffrey L.: AUTHOR [+2]

Abstract

UNCLASSIFIED Security Classification I DOCUMENT CONTROL DATA .- W&D I Hierarchical Associative Memories for Parallel Computation I 4. DESCRIPTIVE NOTES (Type of report and inclusive dates) Ph.D. Thesis, Department of Electrical Engineering, May, 1970 5. AUTHOR(S) (Last name, first name, initial) Gertz, Jeffrey L. 6. REPORT D A T E 78. TCTAL NO. O F PAGES 7b. NO. O F REFS I May, 1970 1 48 Nonr-4102 (01) b. PROJECT No. MAC TR-69 (THESIS) C . REPORT NO(S) (Any other numbers that may be assigned this report) 8a. CONTRACT OR GRANT NO. 98. OFIIGINATOR'S REPORT NUMBER(S1 10. AVAILABILITY/LIMITATION NOTICES I Distribution of this document is u.nlimited, dva~nced Research Projects Agency iinqton, D,C. Two current trends in computing, namely the increasing importance of parallelism in computer operations and the concept of programming generality, indicate that new computer systems must employ location- independent addressing. One possible manner of accomplishing this objective involves the use of an associative memory for the computer system. This report i s concerned with the study, analysis, and design of a multi-level associative memory for a highly parallel computer system, as well as the representation and execution of highly parallel programs i n such a memory hierarchy.

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UNCLASSIFIED
Security Classification

I DOCUMENT CONTROL DATA .- W&D

I Hierarchical Associative Memories for Parallel Computation I

4. DESCRIPTIVE NOTES (Type of report and inclusive dates)

Ph.D. Thesis, Department of Electrical Engineering, May, 1970

5. AUTHOR(S) (Last name, first name, initial)

Gertz, Jeffrey L.

6. REPORT D A T E

( 78. TCTAL NO. O F PAGES 7b. NO. O F REFS

I

May, 1970 1 48

Nonr-4102 (01)

b. PROJECT No. MAC TR-69 (THESIS)

C . REPORT NO(S) (Any other numbers that may be assigned this report)

8a. CONTRACT OR GRANT NO. 98. OFIIGINATOR'S REPORT NUMBER(S1

10. AVAILABILITY/LIMITATION NOTICES

I

Distribution of this document is u.nlimited,

dva~nced Research Projects Agency iinqton, D,C.

    Two current trends in computing, namely the increasing importance of parallelism in computer operations and the concept of programming generality, indicate that new computer systems must employ location-

independent addressing. One possible manner of accomplishing this objective involves the use of an associative memory for the computer system. This report i s concerned with the study, analysis, and design of a multi-level associative memory for a highly parallel computer system, as well as the representation and execution of highly parallel programs i n such a memory hierarchy.

I

14. KEY WORDS

Computers, Associative memories, Parallel computation, Memory hierarchies

IED

Security Classification

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HIERARCHICAL ASSOCIATIVE MEMORIES F013 PARALLEL COMPUTATION

Jeffrey L e e G e r t z

June, 1970

PROJECT MAC

MASSACHUSETTS INSTITUTE OF TECE3NOLOGY

Cambridge Massachusetts 02139

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2

HIERARCHICAL ASSOCIATIVE MEMORIES FOR PARALLEL COMPUTATION*

Abstract

     Two current trends in computing, namely the increasing importance of parallelism in computer operations and the concept of programing generality, indicate that new computer systems must employ location-independent addressing, One possible manner of accomplishing this objective involves the use of an associative memory for the computer system. This thesis is concerned with the study, analysis, and design of a multi-level associative memory for a highly parallel computer system, as well as the representation and execution of highly parallel programs in such a memory hierarchy.

     The thesis first develops a simple model for the representation of programs which preserves and indicates their inherent parallelism, as well as meshing well w i t h the requirements of programming generality, Then it presents a scheme for representing the resultant objects in an associa- tive memory and develops a corresponding parallel execution algorithm, Next the properties of the memory hierarchy itself ar...