AUTOMATIC TEST, CONFIGURATION, AND REPAIR OF CELLULAR ARRAYS
Original Publication Date: 1975-Jun-30
Included in the Prior Art Database: 2007-Mar-30
Software Patent Institute
Manning, Frank B.: AUTHOR [+2]
AbstractFrank B. Manning
AUTOMATIC TEST, CONFIGURATION, AND REPAIR
OF CELLULAR ARRAYS
Frank B. Manning
l@lSSACHUSETTS INSTITUTE OF TECHNOLOGY
PROJECT M h Z
AUTOMATIC BEST, CONFIGURATION, AND REPAIR OF CELLULAR ARRAYS
Frank Blase Manning
Submitted to the Department of Electrical Engineering on May 22, 1975, in partial fu$fi8lment 08 the requirements for the degree of Doctor of Philosophy.
A cellular array is an iterative array sf identical information processing machines, cells. The arrays discussed are rectangular arrays of programrnab!~ logic, in which information stored in a working cell tells the ce$l Row to behave. No signal tine connects more than a few cells. A loading mechanism in each cell allows
a computer directly connected 80 one ~818 to load any good cell that is n ~ t walled
off by fsawed cells. A loading arm is grown by programming cells to form a path
that carries loading information. Cell mechanisms allow a computer to monitor the
growth ~f a Boading arm, end to change the arm's route to avoid faulty cells. Properly programmed cel%s
carry test signals between s tested cell and a testing computer directly connected to oniy a few cells, The computer may discover the faulty ceils in an array; and repair %he array by loading the erray9s ggssd cells to embed a desired machine.
Terminology and network models are developed to describe %he characteristics of a machine that are important to the test and repair of an array embedding that machine. !mpor%~~t
machine c,Sas~es are defined, and their test and repair requirements are coi3pered. Computer simulations of repair aid this comparison.
Each machina class is represented by ;a particular eeilular machine design Arrays aas presented for realizing klghly-integrated, computer-ma'sntsined memories, such as variable-length shift-registers, racdcm-access mamories, and track-addressed seqksentiai-access memorie:;. One flawed array of simple cells may perform like any digital machine, within limits set by the size of the array, its number of input-output leads, aind the speed of its components. Owe such machine can test, configure, and repaF~ its ceIlle&ar ~nvironmepaf, App%ice%ions
celluiar arrays are discussed.
I he thesisbpprsaeh is orhented toward the re8"hitias and trends in large-seal a integrated c; rcui t prsduckien; and has potential integration Bevel, reliability, maintainability, and flswibili ty advartages.
THESIS SUPERVISOR; Edward &redkin
TITLE: Professor of EBectaica! Engineering acd Computer Science
Professor Edward Faedkin helped ns "A,roughou% my graduate schooling