Browse Prior Art Database

DQs redirection Solution for Dual-Die or Stacked Memory Components Testing

IP.com Disclosure Number: IPCOM000161618D
Published in the IP.com Journal: Volume 7 Issue 12B (2008-01-01)
Included in the Prior Art Database: 2008-Jan-01
Document File: 3 page(s) / 95K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

The need for dual-die or stacked memory components has been increased by market requirements. When testing these systems in backend production, the test time is an important cost factor. In order to reduce costs, the throughput has to be maximized. To achieve this goal, the dual-die or dual-stacked components will be tested in parallel. However, the DQs (data query = data line) are shared between all dies in a stack or Multi-Chip-Package, so that it is not easy to test them in parallel. In some cases, dual-dies or multiple-die packages are called "half-good", since only one die or some dies are functional. They can still be used as single die components and therefore are a new topic for backend testing.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 3

page: 1

DQs redirection Solution for Dual-Die or Stacked Memory Components Testing

Idea: Feng Wang, CN-Xi'an; Martin Schnell, CN-Xi'an

The need for dual-die or stacked memory components has been increased by market requirements. When testing these systems in backend production, the test time is an important cost factor. In order to reduce costs, the throughput has to be maximized.

To achieve this goal, the dual-die or dual-stacked components will be tested in parallel. However, the DQs (data query = data line) are shared between all dies in a stack or Multi-Chip-Package, so that it is not easy to test them in parallel. In some cases, dual-dies or multiple-die packages are called "half- good", since only one die or some dies are functional. They can still be used as single die components and therefore are a new topic for backend testing.

At present, one solution exists that tests dual-die (or stacked) memory components separately. The testing has to be done separately, since there is a DQ conflict while readout because both dies share the same DQ pins connected with the tester channels. This situation doubles the testing time (see figure 1). In a different solution, the testing of dual-die (or stacked) memory components is executed at the same time by measuring the voltage of the crossed DQ pins. This so called "output level approach" can reduce the test time, but it is only valid for tests with compression test mode, e.g. ACTM (Advanced Compression Test Mode). Furthermore, there exists an idea to redirect the DQs under ACTM mode for different chips. However, this solution is not valid for tests with TMX4. In this test mode the device is soft-configured as an x4-organization device, even it is actually x8, x16. TMX4 is the I/O structure selection signal output from the test circuit at the time of the test mode.

To minimize the backend test time of dual-die or stacked components and to provide a "half-good" dual-die testing solution, a novel parallel testing solution will be proposed. Therefore, a new test mode which can redirect DQ pins also under TMX4 situations will be introduced. This new test mode will contain an enhanced DQ redirection function, i.e. valid for both ACTM and TMX4 situations. In figure 2 this redirection is shown. DQs 4-7 of the second die (CS...