Browse Prior Art Database

Transmitter Scheme for Matched and Controlled Rise-Fall Time Applications

IP.com Disclosure Number: IPCOM000169408D
Publication Date: 2008-Apr-15
Document File: 6 page(s) / 35K

Publishing Venue

The IP.com Prior Art Database

Abstract

In deep submicron CMOS technologies, rise-fall times of output buffers see a wide range of variation across PVT corners. Also, rise-fall times are significantly apart at skewed process corners. The proposed scheme aims at providing transmitter architecture for drivers driving capacitive loads. Using this scheme, the transition (rise-fall) times obtained are highly controlled and matched at various PVT corners. The scheme is particularly helpful for differential or pseudo differential transmission standards.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Transmitter Scheme for Matched and Controlled Rise-Fall Time Applications

Abstract

In deep submicron CMOS technologies, rise-fall times of output buffers see a wide range of variation across PVT corners. Also, rise-fall times are significantly apart at skewed process corners. The proposed scheme aims at providing transmitter architecture for drivers driving capacitive loads. Using this scheme, the transition (rise-fall) times obtained are highly controlled and matched at various PVT corners. The scheme is particularly helpful for differential or pseudo differential transmission standards.


Body

In ever shrinking CMOS technology, properties of a device vary significantly across PVT corners. For an output driver designed to obtain a 50 Ohms drive at a typical PVT corner, the drive can be seen to range from 30 to 80 Ohms across all PVT corners. This variation in drive results in varying transition times. Also, the cross corners with faster (slower) n-type and slower (faster) p-type devices show significantly apart rise and fall times at the same corner. This can be troublesome for differential and pseudo differential standards requiring transitions to be aligned and matched.

Current methods that are already in practice to tackle the problem either require bulky process detection blocks or process independent reference generators to calibrate the drive strength. In a first scheme, a Process Detection Block (PTB) is required, which generates a set of bits indicating the process corner.  The driver is laid down in parts that operate in parallel and are controlled by bits generated by the PTB. Thus, controlled drive strength is achieved across corners. The method provides satisfactory results, but a disadvantage of the method lies in the bulky and power consuming PTB. Also, the degree of control is governed by the number of bits produced. So, a tradeoff exists between power and complexity of the PTB versus the control achieved.

Few schemes use a reference current generator to produce a constant current that is independent of PVT corners and use this current for charging and discharging the load capacitor. This scheme also provides required behaviour but the reference current generators are generally more power consuming. Also, they need external resistors and suffer from voltage dependence of transition times.

Other schemes use source follower type outputs that are self compensated owing to feedback from the source.  However, such schemes are not suitable for rail-to-rail outputs and need a secondary driver to obtain a full-swing operation. This introduces a dual slope kind of output which may not be accep...