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A Method To Track The Changes Done In A Design To Generate A .SOF File

IP.com Disclosure Number: IPCOM000169465D
Publication Date: 2008-Apr-17
Document File: 2 page(s) / 28K

Publishing Venue

The IP.com Prior Art Database

Abstract

Today, programmable hardware devices are typically configured using the vendor software that takes the hardware designs , synthesizes the designs to its target architecture and generates a bit stream file (consists of 1’s and 0’s ). The bit stream file is downloaded into the target hardware device. The bit definitions of these bit stream files are not available to user. Therefore, to find out the changes made to the hardware designs users have to go through a tedious process to understand the hardware changes. This disclosure proposes a simpler method to identify the design changes.

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Abstract:

 Today, programmable hardware devices are typically configured using the vendor software that takes the hardware designs , synthesizes the designs to its target architecture and generates a bit stream file (consists of 1’s and 0’s ). The bit stream file is downloaded into the target hardware device. The bit definitions of these bit stream files are not available to user. Therefore, to find out the changes made to the hardware designs users have to go through a tedious process to understand the hardware changes. This disclosure proposes a simpler method to identify the design changes.

Background

During development phases, designers go through multiple revisions of generating bit streams for the hardware designs and test the working of the design by downloading the bit stream into the FPGA.  Typically the hardware designs consist of 20-40 design modules created as separate files using HDL languages (verilog or VHDL. To identify the design changes for a generated bit stream file, users typically follow conventions in naming the bit stream files such that the file name indicates the changes in the design.

For example (assume the generated bitstream file has an extension bitstr) with changes to the following three variables/parameters (assumed) in the design.

Counter, output_voltage, and loopback. A typical naming would be

Counter_default_250_output_voltage_100_loopback_disabled.bitstr

This naming is not scalable if the number of changes in the design increases. The other option for users to identify the design changes would be to save the version of all the hardware design files used in generating a bit stream file and then find out the changes made to each of the design files. This involves saving each version of the design files based on the bit file generation. This disclosure proposes a method to determine the design changes corresponding to the vendor generated bit stream files.

Implementation

             The fundamental idea behind this proposed implementation is to detect the design changes associated...