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3G WCDMA & LTE Code Generation Unit

IP.com Disclosure Number: IPCOM000176986D
Publication Date: 2008-Dec-02
Document File: 5 page(s) / 32K

Publishing Venue

The IP.com Prior Art Database

Abstract

Many tasks of demodulating 3G WCDMA (wide band code division multiple access) or LTE (long term evolution) signals require generation of the following various codes:

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3G WCDMA & LTE code generation unit

   

Abstract 

Many tasks of demodulating 3G WCDMA (wide band code division multiple access) or LTE (long term evolution) signals require generation of the following various codes:

 

  • 3G WCDMA Downlink:
    • Scrambled pilot generation (required for Channel estimates for HS-DSCH channel equalization).
    • Despreading + descrambling + STTD (space time transmit diversity)  decoding.
    • Channel estimation.
    • Cell search stage 3.
  • 3G WCDMA Uplink
    • Spreading + scrambling.
    • RACH (Random access channel) preamble generation.
  • LTE
    • Scrambling + descrambling.

A general purpose architecture, such as a classic DSP (digital signal processor) is not efficient in performing tasks that involve code generation since the amount of MCPS(mega cycles per second) required for generating these codes are enormous. The common solution to this problem is a dedicated hardware.

Classic dedicated hardware duplicates the hardware according to the number of tasks that are being performed simultaneously, which results large area/power consumption, and they usually lack the ability to support a variety of standards (3GPP-CDMA, 3GPP-LTE). Having a dedicated hardware to support each of the standards is area inefficient.

The present document describes a general hardware design that can generate 3G / LTE codes that are used by the UE(User equipment) demodulator.

The proposed device is a programmable, efficient, multi-tasking & parallel hardware that generates 3G CDMA and LTE codes and that can be integrated with a parallel microcode machine, to support implementation of 3G and LTE tasks

The code generation unit outputs supply, on each clock cycle, a vector of code samples. The vector length may vary from one sample and up to 64 samples per cycle. The nature of the 3G WCDMA and LTE codes is that they are long streams which repeat them selves after ~40000 samples. The option of processing up to 64 samples per cycle in a parallel microcode machine or DSP , when the code generation unit is integrated in the system, makes mathematical calculations such as vector correlations and vector multiplications much more efficient then the classic DSP solutions. The code unit may supply on the first cycle code samples 0-63, on the second cycle samples 64-127 and so on until it reached the end of the generated code. Then it will roll over to the code start automatically when reached the defined vector length.

The parallel outputs of the code generation unit (per each HW cycle) cause the most significant improvement in the integrated system performance.

Body 

The described HW(hardware) is a programmable, efficient, multi-tasking & parallel hardware that generates 3G and LTE codes and that can be integrated with a parallel microcode machine, to support implementation of 3G and LTE tasks.

Block diagram

The following figure is a high level block d...