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Data Processing ASIC Based on the DRAM Interface and Stacked Package

IP.com Disclosure Number: IPCOM000180718D
Original Publication Date: 2009-Mar-16
Included in the Prior Art Database: 2009-Mar-16
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Abstract

For the cost-sensitive product, the time-to-market and the engineering cost is the key point. In the prototype design phase for a new product, the engineers employ some new ASIC chips to increase the system performance. The PCB should be re-designed, which results in extra engineering cost and more time-to-market. The proposed solution provides a trade-off solution for the customer to reduce their engineering cost, as long as the time-to-market. The proposed solution is based on the idea of memory remapping at cost of the DRAM space. It allows clients to upgrade their existing platforms without complex modification and large investment. With this solution, PCB re-design is un-neccessary for many new product with DRAM interface.

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Data Processing ASIC Based on the DRAM Interface and Stacked Package

Data Processing ASIC Based on the DRAM Interface and Stacked PackageData Processing ASIC Based on the DRAM Interface and Stacked Package

Structure of the ASIC chip with DRAM interface

Structure of the ASIC chip with DRAM interfaceStructure of the ASIC chip with DRAM interface

Providing the data processing ASIC chip with DRAM interface, the ASIC chip can be controlled by an external DRAM interface through the CUP bus. Then by means of stackedly packaging the ASIC chip with the DRAM chip together, the ASIC chip is hiden in the DRAM chip's package. Hardware engnieers are able to integrate the tow chips together into their existing PCB, only by means of replacing the current DRAM with the new chip. As a result, no re-design for the PCB is needed . It can be described as the Fig . 1 as below.

Fig. 1 Proposed Structure of the ASIC

The main modules in the ASIC are described as follows .

DRAM I/F

This is the popular interface in the current MCU chip

Input I/F&Output I/F

This interface converts the external I /F into the internal I /F.

Mem

Some kind of embedded memory

Data Processing

    It can be some kind of pipeline processing structure for the implementation of the client's algorithm. It depends on the complexity of the algorithm .

The proposed data flow is described as follows .

MCU write the raw data into the ASIC through DRAM interface .

    ASIC finishes the data...