Browse Prior Art Database

A mechanism supporting profiling tools on a dynamic binary translator

IP.com Disclosure Number: IPCOM000181770D
Original Publication Date: 2009-Apr-13
Included in the Prior Art Database: 2009-Apr-13
Document File: 3 page(s) / 41K

Publishing Venue

IBM

Abstract

This article describes a mechanism supporting profiling tools, e.g. GDB, on a dynamic binary translator. This mechanism features in adding some performance event profiling module into a traditional dynamic binary translator, while maintainting the high simulation speed. By applying this mechanism, efforts on developing and debuging software on a simulator can be greatly facilitated.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 40% of the total text.

Page 1 of 3

A mechanism supporting profiling tools on a dynamic binary translator

Main Idea

1. Background: What is the problem solved by your invention? Describe known solutions to this problem (if any). What are the drawbacks of such known solutions, or why is an additional solution required? Cite any relevant technical documents or references.

A functional-level simulator is a program that provides virtualized execution environment for guest applications, and even guest OSs can be executed if the simulator is a full-system one. For example, a full-system, functional-level simulator can enable PowerPC Linux and Linux applications to run on an x86 Windows platform. Dynamic binary translation (DBT) is a popular technology to implement a functional-level simulator now.

Nowadays, the pressure from market competition leads to significant requirements on shortening

time-to-market (TTM) of a new chip and its systems. That results in the popularity of hardware/software parallel development. From the software developers' perspective of view, parallel development means that software has to be coded and debugged before a silicon chip and a physical system are available. In such cases, a functional-level simulator helps greatly, acting as a virtual development platform.

Meanwhile, many popular profiling tools, e.g. oprofile, vTune, gprofile, etc., play key roles in current software development processes. Software developers leverage those tools to analyze execution behaviors and features to optimize software performance. All those profiling tools work by collecting detailed hardware status information which is provided by performance counters of processor architectures.

However, since current functional-level simulators speed-up their execution essentially at the sacrifice of simulation accuracy, they can not model the hardware details and provide a performance counter simulation mechanism. Thereby, at the best of our knowledge, no functional-level simulator can support profiling tools in its guest systems, which makes pre-silicon software development more challenging.

2. Summary of Invention: Briefly describe the core idea of your invention (saving the details for questions #3 below). Describe the advantage(s) of using your invention instead of the known solutions described above.

Our invention introduces a method, apparatus and functional-level simulator to support profiling tools by providing performance counter simulation capability while maintaining relatively high simulation performance, which can greatly facilitate current pre-silicon software development. Its application in software development process can be described in Fig. 1.

1

[This page contains 1 picture or other non-text object]

Page 2 of 3

Fig. 1 Application of our simulator in software development

From Fig.1, we can see that this simulator can run on host system, and...