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Power-BW improvement in high power DA

IP.com Disclosure Number: IPCOM000190398D
Original Publication Date: 2009-Nov-27
Included in the Prior Art Database: 2009-Nov-27
Document File: 6 page(s) / 495K

Publishing Venue

Motorola

Related People

Aridas, Narendra Kumar: INVENTOR

Abstract

This disclosure gives overview design proposal to achieve high output power-bandwidth with distributed amplifier (DA) approach. Cascaded non-identical high-ft transistors (having lower Cgs; Vbr) is coupled to the input of high power transistor with tapered impedance termination - to improve power-bandwidth in DA. Number of high-ft transistors (Q1..Qn) and their device periphery depending on power-BW product. The tapered termination at each stage improves matching near cut-off frequency.

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MOTOROLA TECHNICAL DEVELOPMENTS

INFORMATION SHEET

FOR DEFENSIVE PUBLICATION

Date:                           8th SEPTEMBER 2009

Title:                            POWER-BANDWIDTH IMPROVEMENT IN DISTRIBUTED

AMPLIFIER

Docket No.:              CM12852AT (58619)

Author

Name:                                    NARENDRA KUMAR

                                    85010585

POWER-BANDWIDTH IMPROVEMENT IN DISTRIBUTED POWER AMPLIFIER

Narendra Kumar

Motorola Technology, R&D,

Penang

,

Malaysia

 

ABSTRACT

This disclosure gives overview design proposal to achieve high output power-bandwidth with distributed amplifier (DA) approach. Good results of 30W power, >35% PAE, 37dB gain, and covering from 100-2000 MHz frequency is achieved in simulation level with the proposed topology. 

INTRODUCTION

Few works have been demonstrated with LDMOS, GaN HEMT and HBT technology to achieve high power [1] – [6]. However, due to loading effect of bigger size transistor, DC-RF conversion energy is not optimum especially near cut-off frequency. Table 1 (in last page of this disclosure) shows state‑of‑art of power‑bandwidth performance of distributed amplifier.

Many techniques have been reported to improve gate line matching problem in DA e.g. tapering of device gate‑widths [7], tapering the capacitors connected in series with transistor inputs [8], tapered gate line for gaining equal voltages at the transistors by moving characteristics impedance higher than 50W [9] and tapering the gate line to reduce gate line mismatching [10].

Constant-k network isolates the parasitic capacitances of the transistors to form wide bandwidth response with lumped inductance. This frequency dependent impedance implies that a fixed 50 W termination cannot provide ideal matching transformation. A constant real termination causes ripples as the signal moves towards cut‑off frequency due to unmatched power that reflects back to the input and the imaginary that has not been cancelled [10]. It is worthwhile to trade‑off the low frequency matching to improve matching at high frequencies.

CIRCUIT ANALYSIS

In this work, broadband match to the input of the power transistor is discussed, shown in Figure 1. A high‑ft transistor (typical has lower Cgs and Vbr, i.e. SiGe, HBT, pHEMT device) is coupled to the input of the power transistor (i.e. GaN HEMT device) with tapered impedance termination. The termination improves matching near cut‑off frequency without trading‑off at low frequency. Typically output capacitance Cds of the high‑ft transistor is much lower than input capacitance Cgs of the power transistor. In this work we make assumption Cgs »2×Cds, however the concept may applicable to any ratio of Cgs/Cds.

Figure 1: A c...