There will be a system update on Tuesday, January 16th, 8 PM ET. You may experience a brief service interruption.
Browse Prior Art Database

Method and System for Fabricating an Ion-Blocking Decoupling Capacitor (IB-DECAP)

IP.com Disclosure Number: IPCOM000195051D
Publication Date: 2010-Apr-20
Document File: 5 page(s) / 140K

Publishing Venue

The IP.com Prior Art Database


A method and system for fabricating an Ion-Blocking Decoupling Capacitor (IB-DECAP) is disclosed. The fully-covered, IB-DECAP structure is fabricated on a top surface of a chip. The IB-DECAP structure shields the chip from harmful ion bombardment. In addition, the IB-DECAP does not require an active Silicon (Si) to enable charged particle collection.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 5

Method and System for Fabricating an Ion -Blocking Decoupling Capacitor (IB-DECAP)

Disclosed is a method and system for fabricating an Ion-Blocking Decoupling Capacitor (IB-DECAP).

Figure 1

Fig. 1 illustrates a first step of forming the fully-covered, IB-DECAP structure on a top surface of a chip. In response to completing the final metallization of a chip, a layer of dielectric 300 is deposited on the top surface of the chip. In an instance, the dielectric 300 is a conventional low-k material with a thickness ranging from 0.1 um to 1 um. Thereafter, at step 2, a metal film is deposited to serve as a lower electrode of a decoupling capacitor MC1. The metal film may be made of Aluminum, Copper, Silicide, doped poly-silicon, or other conductive semiconductor materials with a thickness ranging from 0.05 um to 1 um.


[This page contains 1 picture or other non-text object]

Page 2 of 5

Figure 2

In response to forming the deposition of the metal film, at step 3, a Reactive Ion Etching (RIE) process 510 is carried out to etch and define the lower electrode after a Photo Resist (PR) 500 is coated and patterned. Further, as depicted in Fig. 2, a layer of high-k dielectric film 600, such as Al2O3, ZrO2, HfO2, Ta2O5, etc., is deposited at step 4. The thickness of dielectric film 600 is in the range of 0.005 to 0.5 um. High-k dielectric film 600 sandwiched with metal film provides the high blocking power for the ions. Thereafter, another metal film is deposited at step 5 to serve as an upper electrode of the IB-DECAP.


[This page contains 1 picture or other non-text object]

Page 3 of 5

Figure 3

After the deposition of this metal film, a second Photo Resist (PR) patterning 800 is performed at step 6. Thereafter, as shown in Fig. 3, the RIE etching is performed to define the upper electrode of the IB-DECAP, thereby completing the fabrication of the IB-DECAP. Subsequently, a dielectric film 900 is deposited to cover a wafer and to passivate the chip at step 7. Dielectric 900 may be any insulating material having a good sealing property. At step 8, a contact patterning 1000 is carried out to form contacts to the IB-DECAP. The contacts are formed by first etching through the upper and lower electrod...