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Method and System for Fabricating Lateral Electrostatic Discharge (ESD) Device in eDRAM Process

IP.com Disclosure Number: IPCOM000195053D
Publication Date: 2010-Apr-20
Document File: 5 page(s) / 127K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system for fabricating lateral electrostatic discharge (ESD) device in embedded Dynamic Random Access Memory (eDRAM) process is disclosed.

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Method and System for Fabricating Lateral Electrostatic Discharge (ESD) Device in eDRAM Process

Disclosed is a method and system for fabricating lateral electrostatic discharge (ESD) device in embedded Dynamic Random Access Memory (eDRAM) process.

Figure 1

In general, lateral N-P-N devices are used as ESD protection devices. The lateral N-P-N devices discharge current to ground i.e., VSS during positive mode ESD whereas N+/PW diode in N-P-N devices discharge ESD current to VSS during negative mode ESD. Most commonly used implementation for ESD protection involves use of lateral N-P-N device in a silicide-blocked N-type Field Effect Transistor (NFET). Fig. 1 shows a systematic process for fabricating lateral electrostatic discharge (ESD) device in eDRAM process. As shown in fig. 1, at step 1, a pad layer of Nitride and Oxide is deposited on a Silicon (Si) substrate to form an oxide hardmask. Thereafter, at step 2 a

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Photo Resist (PR) is deposited on the pad layer and a trench is patterned. At step 3 & 4, a Reactive Ion Etching (RIE) is used for etching Nitride and Oxide at the patterned trench in a step-by-step process. Subsequently in step 5, the PR is removed and the Oxide layer is removed using RIE, thereby removing the oxide hardmask.

Figure 2

In step 6, as shown in fig. 2, an arsenic doped glass (ASG) is deposited in the patterned trench. Subsequently, in step 7, the PR is filled over the ASG in the patterned trench. Thereafter, partial PR is removed and a resist recess and an ASG recess is performed in step 8. In next step 9, the PR is removed completely and a drive-in anneal is performed in the trench over ASG.

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Figure 3

As shown in fig. 3, in step 10 of the fabrication process, the ASG is removed and a dielectric (depicted as yellow in fig. 3) is deposited in the trench patterned. Thereafter, at step 11, the PR is deposited to cov...