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Worst-Case Eye Diagram Simulation Including Effects of Nonlinear I/O Devices and Crosstalk

IP.com Disclosure Number: IPCOM000197696D
Publication Date: 2010-Jul-19
Document File: 2 page(s) / 64K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method based on nonlinear transient circuit simulation for deriving the worst-case eye diagram, taking into account the cross-talk from adjacent channels using very short signal bit patterns.

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This is the abbreviated version, containing approximately 51% of the total text.

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Worst-Case Eye Diagram Simulation Including Effects of Nonlinear I /O Devices and Crosstalk

The evaluation of the voltage eye diagram at the input of a receiver of a signal channel is the principal procedure used to establish the signal integrity of the system design, including the electronic package interconnections.

    Circuit transient simulations based on transistor level I/O device models and multi-channel s-parameter models provide accurate waveforms for the determination of the required eye diagram. However, these circuit transient simulations are usually unacceptably slow in simulating an eye diagram of a real packaging system, which needs thousands, even millions of random bits in the input signal pulse train to capture a "worst-case" eye diagram. This is equally true when the crosstalk from adjacent channels must be included in the transient circuit simulations.

    Currently, most existing algorithms for the electronic packaging system eye diagram fast evaluation are based on linear I/O device models. The linear convolution of single step or single bit system response to a very long input bit pattern is widely used
in industry today to achieve this task. For linear systems there exist fast algorithms such as the peak distortion analysis for including the signal inter-symbolic interference (ISI)
[1][2] impact to the eye diagram. The peak distortion analysis has been extended to account for the worst-case crosstalk from the adjacent channels [3] and construct the worst-case eye within a reasonable time.

The basic, implicit assumption of these algorithms is that the I/O devices are linear and time invariant circuit elements. The actual I/O circuits are neither. Other methods, such as the one by N.Signh et al [4], can accommodate nonlinear I/O devices; however, their computation cost is still high for the high-end computer multi-level packaging system eye diagram simulation which must account for at least eight crosstalk aggressors.

    The solution is a method for the prediction of...