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A method or an apparatus to reduce the number of SCOM write operations during CEC hardware initialization/diagnostic process in servers.

IP.com Disclosure Number: IPCOM000199808D
Publication Date: 2010-Sep-16
Document File: 2 page(s) / 22K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to reduce firmware SCOM access overhead to speed up server boot time

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 52% of the total text.

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A method or an apparatus to reduce the number of SCOM write operations during CEC hardware initialization/diagnostic process in servers.

Each SCOM register access requires some firmware execution time, and in the case where the target is in a remote location (node), it also requires some network data transfer time. There are thousands of such SCOM accesses need to be done at boot time to initialize hardware. This article describes a method to eliminate a large amount of SCOM access overhead, thus reducing server boot time. The method employs the following two strategies:

Perform SCOM accesses in a batch.

1.

Utilize the Multicast feature in IBM Power7 chip to write data to multiple chip's internal units

2.

at once.

Hardware initialization procedures mainly contain multiple SCOM writes of pre-defined data to different address locations in a chip. These writes, therefore, can be grouped into a SCOM batch where each entry contains the data and address location. This SCOM batch can then be sent to the ADAL layer (Access Device Abstraction Layer) who will serially carry out all the individual SCOMs in the batch. This strategy eliminates repeating firmware back and forth calls as if the SCOM accesses were done individually. In the case where the target hardware is in a remote location, this strategy also helps eliminate unnecessary data being transferred on the network (network message frame overhead for individual SCOM access), thus reducing a large amount of network traffic.

IBM Power7* and future processor chips allow firmware to write to multiple units in a chip within one SCOM transaction (for example, all core chiplets in P7). This is called Multicast addressing mode, wh...