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Inline process monitoring for integrated circuits with air-gap interconnects

IP.com Disclosure Number: IPCOM000201785D
Publication Date: 2010-Nov-23
Document File: 1 page(s) / 21K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to use an analytical balance to characterize the removal of inter-level dielectric during air-gap processing. The new weight measurement technique determines whether gaps are formed and data is easily plotted on a statistical process control chart.

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Inline process monitoring for integrated circuits with air -gap interconnects

Inline monitoring of Air gap structure for interconnects is needed for the following reasons. Airgaps for 65nm and beyond technology nodes require gap sizes to be less than the technology's ground rule to ensure reliability. For example, 65nm ground rule for minimum copper and dielectric line width is 100nm. However, top critical dimensions (CDs) are greater leading to smaller spaces for gap formation. Furthermore, gap space must consider lithography overlay tolerance capability for manufacturability. The very small gap structure then becomes a challenge for metrology CD or atomic force microscopy (AFM) tools to monitor gap formation. For 45nm, the gap structure CD shrinks to <50nm and top-down nanosem tools become extremely challenged. In-situ etch tools are incapable of detecting small changes in optical spectra intensity when small areas, such as gap structures with less than 5-10% pattern factor, are etched. These limitations necessitate a new technique to monitor gap formation in costly logic devices.

Currently, characterization for the removal of inter-level dielectric during air-gap processing is only available offline and requires destructive analysis of the air-gap samples. The disclosed method allows for a nondestructive inline characterization.

The solution is a weight measurement monitoring tool suitable for both thinwire and fatwire interconnect levels. If 12mg of SiCOH re...