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VIRTUAL DIGITAL PROBING IN AN INTEGRATED CIRCUIT

IP.com Disclosure Number: IPCOM000216242D
Publication Date: 2012-Mar-26
Document File: 3 page(s) / 80K

Publishing Venue

The IP.com Prior Art Database

Abstract

A flip-flop circuit topology includes logic that allows the state of any such flip-flop circuit in an integrated circuit, or any register circuit comprised of the flip-flop circuits in an integrated circuit, to be observed in real time without physical probing of the integrated circuit.

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VIRTUAL DIGITAL PROBING IN AN INTEGRATED CIRCUIT

Abstract

A flip-flop circuit topology includes logic that allows the state of any such flip-flop circuit in an integrated circuit, or any register circuit comprised of the flip-flop circuits in an integrated circuit, to be observed in real time without physical probing of the integrated circuit.

Description

Digital electronic designs continue to increase in complexity and operating speed as the physical size of electronic circuits continues to decrease in size.  This makes it increasingly difficult for designers to verify complex designs using diagnostic tools.  Problems that appear in designs that are implemented in silicon, or problems that are reported in returned products, need to be analyzed to deduce whether the problems are due to the original design. 

Traditionally, when design issues arise in an integrated circuit, debug methods have included physically probing the internal metal lines of the integrated circuit.  However, physical probing has become increasingly difficult as the feature size and metal size of the designs continues to shrink.  Another method includes adding pre-designed test points or test pads to the design to facilitate probing.  However, adding test points adds additional logic and size to the designs and is only helpful if the design issue that occurs is actually in the area accessible with the test point.  A further method is to compare behavior of the flawed design with design simulation results or with a design implemented with a fled programmable gate array (FPGA).  These methods can be become more difficult and time consuming as the design nears the production stage.

To allow improved debug of integrated circuit designs, the flip-flop circuit in the Figure below includes a virtual probe capability to allow any single flip-flop circuit in the design or register comprised of such flip-flop circuits to be viewed in real time using an external integrated circuit pad.  The flip-flop circuit expands upon the design of a traditional two-latch scan-able flip-flop circuit.  The flip-flop circuit with virtual probing adds a third latch circuit, a second multiplexer (MUX) circuit, and a design enable (DE) input.

As shown in the truth table, when the DE and SE inputs are both zero the circuit functions as a normal flip-flop circuit.  When the D...