Browse Prior Art Database

Two-Photon Resist Process to Fabricate Stubless Vias

IP.com Disclosure Number: IPCOM000216369D
Publication Date: 2012-Apr-02
Document File: 2 page(s) / 61K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to photolithographically fabricate stubless vias.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 52% of the total text.

Page 01 of 2

Two

Two-

--Photon Resist Process to Fabricate Stubless Vias

Photon Resist Process to Fabricate Stubless Vias

Plated-through holes (PTHs) in high-layer-count printed circuit boards (PCBs) and thick backplanes/midplanes can significantly distort high-speed digital signals. This distortion is typically severe enough that digital receivers can no longer ascertain whether a logical one or a logical zero was originally transmitted. As data rates increase, the amount of distortion introduced by the PTH also increases--usually at an exponential rate considerably higher than the

associated increase in data rate. For example, the distortion producing effects of a PTH via at a


6.25 Gb/s data rate is often more than double that at 3.125 Gb/s. A dominant structure within a PTH via that introduces this undesired distortion is the via stub (see Figure 1).

    Referring to Figure 1, the via stub is that conductive portion of a PTH via not connected in series with the circuit. Since a via stub serves no useful function in the circuit, it can be removed using a technique known as backdrilling. Backdrilling uses controlled depth drilling techniques that are compatible with conventional NC drill equipment. Essentially, a drill bit slightly larger in diameter than the one used to create the original via hole is used to remove the undesired conductive plating in the via stub region. Decreasing via stub length by backdrilling significantly reduces a particularly problematic form of signal distortion called deterministic

j...