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Method and System for Controlling Stress of TSV Wafer using TSV Dummy Shapes of a Calculated Orientation

IP.com Disclosure Number: IPCOM000220551D
Publication Date: 2012-Aug-06
Document File: 3 page(s) / 103K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method and system for controlling stress of a Through Silicon Via (TSV) wafer using TSV dummy shapes of a calculated orientation.

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Method and System for Controlling Stress of TSV Wafer using TSV Dummy Shapes of a Calculated Orientation

A method and system for controlling stress of a Through Silicon Via (TSV) wafer using TSV dummy shapes of a calculated orientation is disclosed.

The use of TSV shapes in different orientations can give rise to an asymmetric stress on the wafer causing it to bow more in one direction than another direction. The bow of the wafer can lead to manufacturing issues in various process tools.

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Figure 1

Figure 1 illustrates a saddle shape wafer resultant of stress from ILD films and TSVs. The shown wafer does not have any dummy TSVs for reduction of asymmetrical stress.

The method of reducing anisotropic stress gradient in a silicon wafer comprises incorporating dummy TSVs shapes to counteract the differential stress so that the wafer is restored to a more manageable shape for processing.

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Figure 2

A wafer having 30% of dummy TSVs oriented vertically (i.e., length of the TSV is parallel to a center line that extends from the flat/notch to a corresponding opposite side of the wafer) and 70% of dummy TSVs oriented horizontally (i.e., length of the TSV is perpendicular to a center line that extends from the flat/notch to a corresponding opposite side of the wafer) with a TSV Pattern Density of 0.8% is shown in Figure 2.

The method comprises of calculated placement of TSV dummy shapes to balance out the anisotropic stresses with the wafer caused by the circ...