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Low Gate-Induced Drain Leakage FET with novel source and drain element

IP.com Disclosure Number: IPCOM000220553D
Publication Date: 2012-Aug-06
Document File: 5 page(s) / 154K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a novel structure of the drain element used in Metal-Oxide Semiconductor Field Effect Transistor (MOSFET) designs. The new structure results in a lowered off state device current without compromising the drive current for circuit speed. The novel structure incorporates a metal to insulator transition material VO2 as a part of the source structure and doped VO2 as a part of the drain structure.

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This is the abbreviated version, containing approximately 53% of the total text.

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Low Gate-Induced Drain Leakage FET with novel source and drain element

Gate-Induced Drain Leakage (GIDL) often places a lower bound on leakage and/or gate dielectric thickness for low-power Metal-Oxide Semiconductor Field Effect Transistor (MOSFET) designs, due to the high electric fields in the semiconductor channel adjacent to the drain when the gate is in an off state and the drain is near the power-supply voltage.

Prior art includes lower overlap designs and thick gate designs, both of which reduce circuit speed. The closest art is a patent describing decreases in field drain-edge gate oxide by Ion-Implantation(US7247919).

Figure 1: Prior art

The novel element of the disclosed invention, missing from the referenced art, is that there is no use of a metal-to-insulator based drain that reduced GIDL current in the off-state of the MOSFET.

This article introduces a novel structure that results in a lowered off-state drain current, without compromising the drive current for circuit speed. The novel structure incorporates a metal-to-insulator transition material, doped-VO2, as part of the drain structure, such that:


• The doped-VO2 is conductive and VO2 is conductive when the MOSFET is in an On-state, and helps to keep high drive to the channel, and


• The doped-VO2 is an insulator and VO2 is insulator in the Off-state, thereby lowering the drain leakage.

The components and features of the invention include:


1. A FET comprising a source, drain, and channel with VO2 source and doped-VO2

1


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drain contact

2. The VO2 source and doped-VO2 are in an insulator state when, Vs=0V, Vg=0V, Vd=1V

3. In the bias configuration in 2, the insulator state of the VO2 and doped-VO2...