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Method and System for Fabricating a Multi-Vt CMOS using Epitaxial Oxide

IP.com Disclosure Number: IPCOM000223279D
Publication Date: 2012-Nov-15
Document File: 3 page(s) / 94K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for utilizing a fixed charge on an epitaxial rare-earth-oxide (REO) layer to provide a threshold voltage (Vt) required for multi-Vt Field-effect transistors (FETs), wherein a Si channel is grown on the epitaxial REO layer.

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Method and System for Fabricating a Multi -Vt CMOS using Epitaxial Oxide

Disclosed is a method and system for utilizing a fixed charge on an epitaxial rare-earth-oxide (REO) layer to provide a threshold voltage (Vt) required for multi-Vt Field-effect transistors (FETs), wherein a Si channel is grown on the epitaxial REO layer. Thus, the method and system disclosed resolves the complication in applying a voltage to back gate which requires implanting dopants into bulk Si thereby damaging a thin Si device layer in an Extremely Thin SOI (ETSOI) FET.

Figure.1 illustrates the epitaxial REO layers (REO1 and REO2) in FET1 and FET2 respectively. The Si channel layer is grown on the epitaxial REO layers.

Figure 1

Further, threshold voltages of FET1 and FET2 are determined by a fixed charge in the epitaxial REO.

In an instance, the method comprises starting with bulk Si substrate, and defining Rx regions with STI isolation (illustrated in Figure 2).

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Figure 2

Subsequent to defining the Rx regions, FET2 is blocked (masked), and recess Si structure is formed on FET1. Subsequently, epitaxial REO1 layer is grown on FET1, and followed by growing epitaxial Si on REO1. This step is illustrated via Figure 3.

Figure 3

The steps of forming Si structure and growing REO2 layer and epitaxial Si layer are then performed on FET2, while FET1 is masked (illustrated in Figure 4).

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Figure 4

The following process flow is similar to that performed for a conventiona...