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Method and System for Improved Electromigration Lifetime in Fabricated Integrated Circuits

IP.com Disclosure Number: IPCOM000225379D
Publication Date: 2013-Feb-12
Document File: 3 page(s) / 109K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system for improved electromigration lifetime in fabricated integrated circuits is disclosed. The method and system passivates exposed defects to avoid corrosion through the defects thus prolonging the electromigration lifetime.

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Method and System for Improved Electromigration Lifetime in Fabricated Integrated Circuits

Copper (Cu) landing pads under solder bumps provide improved electromigration lifetime. However, deposition of Cu in the crack stops and in the kerfs can lead to problems with corrosion and other defects. Hence, it is desirable to form a Cu landing pad structure where the crack stops and the kerfs are passivated.

Disclosed is a method and system for improved electromigration lifetime in fabricated integrated circuits (ICs).

As illustrated in Fig. 1, a device circuit is formed using a standard process. Thereafter, passivation is performed using SiN/SiO2 . Subsequently, final polymeric passivation vias (FV) are formed by coating photosensitive polyimide (PSPI) or by performing reactive ion-etching (RIE).

Figure 1

After performing the RIE, as illustrated in Fig. 2, TaN +Cu seed is deposited by a sputtering process. The deposition is followed by depositing plated Cu by chemical mechanical planarization (CMP) process. Thereafter, the plated Cu is deposited with barrier layer material (BLM), for example TiW or Cu.

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Figure 2

Alternatively, as illustrated in Fig. 3, a resist mask is formed before forming the plate solder.

Figure 3

Thereafter, as illustrated in Fig. 4, the exposed depositions of Cu in the crack spots and the kerfs are taken off to prevent corrosion. Reflow soldering is then performed over the landing pads and solder bumps.

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Figure 4

Foll...