Browse Prior Art Database

Using knowledge of PCIe lane failure to move lanes to second device

IP.com Disclosure Number: IPCOM000227404D
Publication Date: 2013-May-06
Document File: 1 page(s) / 48K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a control system that uses historical data on lane failure of plug-in cards as input into how to configure the Peripheral Component Interconnect express (PCIe) lane widths.

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Using knowledge of PCIe lane failure to move lanes to second device

Peripheral Component Interconnect express (PCIe) hosts allow the designer of the computer/system to distribute the PCIe lanes per slot based on device's needs. That is, it is up to the designer to allocate PCIe lanes to each slot based on system needs. However, in today's systems, once the PCIe lanes have been allocated in hardware, the lanes are left unused to the system when not used by the connected slot.

A system is needed that uses system/device failure history to configure PCIe lane widths. This invention works by keeping a history of previous PCIe devices boot success and using that to determine how likely the device is to have lanes unconfigured for the current power cycle. If the system deems that a device has poor history, it will mux lanes to a device that is likely to work well for this particular boot cycle.

The novel contribution is a control system that uses historical data on lane failure of plug-in cards as input into how to configure the PCIe lane widths.

Figure: Showing x4 lanes being muxed, there could be a system that has control over individual PCIe lanes

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