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Hardware based signal triggered bus isolator.

IP.com Disclosure Number: IPCOM000228642D
Publication Date: 2013-Jun-26
Document File: 2 page(s) / 88K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is an automatic BUS activity detector to use as BUS isolator.

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This is the abbreviated version, containing approximately 100% of the total text.

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Hardware based signal triggered bus isolator .

Background:

It is used to solve the SMBUS interference in some condition when multiple masters must engage the bus. Usually, the multi-master condition requires protocol support with special arbitration but both sides need to support it. It is not required for the situation that those 2 masters are not required to access across thee boundary. Additional hardware switch can be done but explicit condition of topology of bus layout must be obtain via other firmware. The bus switch is controlled by the bus activities. The path is only on if no activity is monitored.

Application:

For system with external interface card, the SMBUS owned could be either slave or master. It could interference the main board SMBUS master which assumes itself as the BUS owner. Protocol arbitration is time/resource consuming process, especially for the topology we know that across boundary access is not required for certain design.

Implementation:

The idea uses the monitor circuit to detect the activity on the bus that requires the isolation.

The first occurrence of the bus action will be caught.

BMC is designed to activate the bus channel before remotely accessing the device. Latch is the feedback to BMC as an acknowledge master device has been found.

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