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A Method and System for Providing High Transaction Rate Authentication using Multiple Secondary Real Time Authentication Parameters

IP.com Disclosure Number: IPCOM000229944D
Publication Date: 2013-Aug-08
Document File: 1 page(s) / 20K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system for caching authentication credentials to provide rapid authentication and authorization response is disclosed. Hardware based Enterprise Service Bus (ESB) and a memory grid is used for providing high transaction rate authentication using one or more secondary real time authentication parameters.

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A Method and System for Providing High Transaction Rate Authentication using Multiple Secondary Real Time Authentication Parameters

Traditional authentication systems are single domain, and software based. However traditional authentication systems face difficulty in scaling while providing authentication services for thousands of applications across multiple domains. Very Large websites providing access to large communities (in excess of 100 million users) with large numbers of concurrent users (in excess of 20 million concurrent) which require limiting access to authorized users face difficulty in managing the transaction rates for user authentication and access control (20,000 authorizations/sec or higher).

Disclosed is a method and system for caching authentication credentials to provide rapid authentication and authorization response. Secondary real time authentication parameters such as, but not limited to, number of failed login attempts in a time period, IP address, geographical location and date of birth are used to authenticate one or more users. The method and system uses a combination of hardware based Enterprise Service Bus (ESB) and an elastic caching memory grid. The method and system puts all the data into the memory grid such that authentication requests can query an authentication credentials database at high transaction rates. Further, authentication transaction log data is also put into the memory grid allowing the writes to be cached, and th...