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DYNAMIC POWER MANAGEMENT OF PROCESSOR EXECUTION UNITS

IP.com Disclosure Number: IPCOM000230888D
Publication Date: 2013-Sep-17
Document File: 3 page(s) / 391K

Publishing Venue

The IP.com Prior Art Database

Abstract

With shrinking technology, power consumed by a SoC is increasing rapidly. The primary contributor of power consumption in a multi-core network packet processor is the processor cores. Several execution units, like the floating point unit, complex arithmetic unit and vector processing unit have limited use in networking workloads. However, they remain powered ON at all times, which dissipates a significant amount of leakage power. We proposed a prediction scheme to dynamically shut-off unused processor core execution units, based on recently executed instructions. The power supply to infrequently used execution units like the Floating Point Unit (FPU), complex unit and vector units are dynamically turned on and off to reduce the leakage power with low performance impact.

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Dynamic Power Management of processor Execution Units

ABSTRACT

With shrinking technology, power consumed by a SoC is increasing rapidly.  The primary contributor of power consumption in a multi-core network packet processor is the processor cores.  Several execution units, like the floating point unit, complex arithmetic unit and vector processing unit have limited use in networking workloads.  However, they remain powered ON at all times, which dissipates a significant amount of leakage power.  We proposed a prediction scheme to dynamically shut-off unused processor core execution units, based on recently executed instructions.  The power supply to infrequently used execution units like the Floating Point Unit (FPU), complex unit and vector units are dynamically turned on and off to reduce the leakage power with low performance impact.

BODY

We propose the use of prediction scheme to dynamically shut off unused execution units of the processor core, based on recently executed instructions.  The power supply to infrequently used execution units like Floating Point Unit (FPU), complex unit and vector units are dynamically turned on and off, which significantly reduces leakage power yet has a minimal impact on performance.  The proposed prediction scheme is a 6-state greedy algorithm.  It saves much higher amount of leakage power than previously proposed schemes while occupying negligible area and power.  The performance impact due to power-gating stall is also negligibl...