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IP.com Disclosure Number: IPCOM000231018D
Publication Date: 2013-Sep-22
Document File: 7 page(s) / 157K

Publishing Venue

The IP.com Prior Art Database


In hardware verification environment, repeated regression is required when design is updated. Regression usually will take a large mount of time to simulate each test case, So it is very necessary to reduce regression time in verification flow. We give a integrated method to improve the efficiency of regression simulation for SOC system. This method mainly foucs on managing the testcases by analysing the hardware resource every testcase used.The hardware resource is not only analyzed from function path but also the functional timing information. After optimize each test case base on our analyze result, testcases are divided into orthogonal and non-orthogonal group to check if they could be simulated in parallel. If part of test cases could be simulated at the same time, the efficiency of the regression will be improved evidently.

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Page 01 of 7



In hardware verification environment, a mount of test cases is simulated on the design under development. Repeated regression is required when design is updated. Such a method is commonly known as "regression simulation". Regression for a new design usually will take a large mount of time to cover each test case. Regression should be ran at least one time after design update, and all test cases will be simulated in a regression.

As design and relevant verification environment become more complex and intricate, The amount of time for completing the simulation of each test case also increase. Reduce the amount of regression time is necessary and important for verification flow, and it is directly to shorten the development cycle.


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Core idea and Claim points

This method is directed to providing methods to improve the efficiency of regression simulation for complex SOC system by using hardware resource management.

1. It divide Hardware resources into groups based on mutual exclusiveness & sharing relationship of each test case.

2. After regression simulation, test cases can be identified as orthogonal cases, non-orthogonal cases, and exclusive cases after automatic resource analysis.

3. Orthogonal cases can be executed in parallel. Exclusive and non-orthogonal cases cannot be executed in parallel. If more test cases can be simulated in parallel, more regression time will be reduced.

4. Non-orthogonal cases can be transformed to orthogonal ones if the cases are in different time zones or they can be split on memory access.

Benefit of the invention:

1. It provides a clear flow to guide the regression simulation to be more efficiency.

2. It can help to reduce the amount of regression time.

3. It can give more confidence of SOC performance when more test case are executed in parallel.


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Detailed Description

This method contain two parts of rules to automatically analyze and optimize the test cases. Test cases Filtration:

1. Treat Performance test cases as Exclusive, such as PLB6 bus extreme test.

2. Treat Chip Initialization test cases as Exclusive , such as Power On Reset test .

3. Treat Chip/System/Bus reset test cases as Exclusive, such asWarm/HOT/Channel reset test.

4. Treat Power Management test cases as Non-orthogonal , such as Sleep test .

5. Treat Bus Configuration test cases as Non-orthogonal, such as PLB6 bus configuration test.

6. Treat Dependent test cases as Non-orthogonal, such asUSB transfer is dependent on DDR.

7. This part may need manual effort.

Resource Management:

1. Collect the MMIO Control Registers & Data Registers for each IP Core.

2. Collect the Memory Space for each IP Core.

3. Collect the Interrupt Service Routine for each IP Core.

4. Collect the Power Managemen...