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METHODOLOGY TO REDUCE ROUTING CAPACITANCE OF ADC CHANNELS

IP.com Disclosure Number: IPCOM000231122D
Publication Date: 2013-Sep-27
Document File: 5 page(s) / 428K

Publishing Venue

The IP.com Prior Art Database

Abstract

As technology nodes shrink, meeting the performance metrics for analog circuits has become challenging. RC parasitic and noise effects have hampered the performance of SoC circuits, especially sensitive analog circuits like ADCs, oscillators, etc. In today’s competitive world as we try to pack more and more functionality on SoC, noise sources are increasing considerably, which affects the intended behavior of the signal. This noise effect becomes more dangerous for signals like ADC input channels where the performance specifications are very stringent. Over the years there have been many methods applied to protect these critical signals from noise sources such as a high toggling net travelling alongside the critical signal. The effect of these noise sources can be minimized by spacing the two signals apart or provide some sort of shield for the signal. Shielding of signals itself causes an extra burden on critical signals in the form of parasitic capacitance. Many forms of capacitances are formed in implementing shielding methods, which increases the net delay of the signals and hence increases sampling time and decreases ENOB (effective number of bits). In this paper, we present a method that not only provides robust shielding for critical signals but also minimizes the extra parasitic resulting due to shielding of signals.

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methodology to reduce routing capacitance of ADC channels

As technology nodes shrink, meeting the performance metrics for analog circuits has become challenging.  RC parasitic and noise effects have hampered the performance of SoC circuits, especially sensitive analog circuits like ADCs, oscillators, etc.  In today’s competitive world as we try to pack more and more functionality on SoC, noise sources are increasing considerably, which affects the intended behavior of the signal.  This noise effect becomes more dangerous for signals like ADC input channels where the performance specifications are very stringent.  Over the years there have been many methods applied to protect these critical signals from noise sources such as a high toggling net travelling alongside the critical signal.  The effect of these noise sources can be minimized by spacing the two signals apart or provide some sort of shield for the signal.  Shielding of signals itself causes an extra burden on critical signals in the form of parasitic capacitance.  Many forms of capacitances are formed in implementing shielding methods, which increases the net delay of the signals and hence increases sampling time and decreases ENOB (effective number of bits).  In this paper, we present a method that not only provides robust shielding for critical signals but also minimizes the extra parasitic resulting due to shielding of signals.

Motivation

•          Noise Rejection: Proposed shielding methodology provides a robust solution for noise rejection which ensures the performance of critical analog signals.

•          Reducing parasitic overheads: Proposed shielding methodology introduces significantly less capacitance parasitic overheads as compared to conventional methods being used for shielding.

•          Performance degradation: Proposed shielding methodology ensures the performance of critical analog signals is not degraded with implementing shielding methodology.

Proposed Approach 

A method of shielding critical analog signals to reduce noise effects and ensure that the parasitic overhead is reduced so that the performance of critical signals is not compromised is presented.

                Key features in our Approach:

•          An efficient signal shielding methodology

•          Robust noise rejection mechanism

•          Capacitance overhead reduction from conventional shielding methodologies.

This Paper contains the following details:

•          Proposed method and its implementation.

•          Robust noise rejection mechanism

•          Capacitance overhead comparison from conventional shielding methodologies.

Conventional Shielding method and capacitance overhead due to shielding of signal

Figure 1 show the conventional shielding approach for the critical high speed channels.

Figure 1: Conventional approach

CS is the Critical Signal to be shielded from noise sources in Mth metal layer. M is the metal layer on which the routing is done. Conventional shielding approach have lateral shield as shown the shieldin...