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Browse Prior Art Database

Partially Suspended Nanowire with a Tensile Channel Stressor

IP.com Disclosure Number: IPCOM000232209D
Publication Date: 2013-Oct-25
Document File: 1 page(s) / 58K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a nanowire structure that is suspended by less than twice the thickness of the gate dielectric plus the workfunction-setting gate metal, resulting in a nanowire that is no longer suspended by the time the bulk of the gate stack material (i.e., poly) is deposited. This simplifies the processing of the structure without sacrificing the Gate All-Around (GAA) aspect of the device.

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Partially Suspended Nanowire with a Tensile Channel Stressor

Suspension of nanowires is necessary to achieve the gate-all-around device structure. However, for a wire-first approach, the gate etch is challenging for such a structure due to the difficulty of clearing the gate material from underneath the nanowire. Additionally, the ability to strain silicon nanowire Field Effect Transistors (FET) channels is an important process capability to implement for performance tuning.

The invention is a structure that is suspended by less than twice the thickness of the gate dielectric plus the workfunction-setting gate metal, resulting in a nanowire that is no longer suspended by the time the bulk of the gate stack material (i.e., poly) is deposited. This simplifies the processing of the structure without sacrificing the Gate All-Around (GAA) aspect of the device. In addition, included in the conformal materials can be a material that is oxidized (e.g., Si, SiGe, Ge), which causes the channel to be strained (under tension).

In addition, it is possible to add a material around the gate material that would oxidize (e.g., Si, SiGe, Ge), in order to bow the wire upward from the buried oxide layer.

Figure: Implementation of the invention in a preferred embodiment

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