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BEVEL DEPOSITION PROCESS

IP.com Disclosure Number: IPCOM000232443D
Publication Date: 2013-Nov-08
Document File: 8 page(s) / 276K

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The IP.com Prior Art Database

Related People

Grace Fang: AUTHOR [+3]

Abstract

Various semiconductor fabrication processes, such as etching may create negative slopes on the wafers’ edge or bevel while exposing bonding materials. Such processes may create black silicon, which may trap contamination that may pollute subsequent processing steps. Various embodiments described in this paper reduce bevel collapse and black silicon.

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BEVEL DEPOSITION PROCESS

Grace Fang, Tong Fang, Yunsang Kim

ABSTRACT

    Various semiconductor fabrication processes, such as etching may create negative slopes on the wafers' edge or bevel while exposing bonding materials. Such processes may create black silicon, which may trap contamination that may pollute subsequent processing steps. Various embodiments described in this paper reduce bevel collapse and black silicon.

BACKGROUND

    In the manufacture of semiconductor products, substrates (e.g., semiconductor wafers) are processed by successively depositing, etching, and polishing various layers to create semiconductor devices. More specifically, plasma-enhanced etching and wafer bonding have often been employed in these processing steps.

    However, etching processes tend to eat away at the substrate edge or bevel, and wafer bonding processes tend to create negative slopes at the wafers' edge or bevel while exposing bonding materials. Figs. 1A-B show examples of these problems in via etching and in wafer bonding.

    Figs. 1A and 1B demonstrate the problem of etching processes eating away at the substrate edge or bevel in a via etch process. Fig. 1A shows a substrate 100 and a substrate edge region 102 prior to etching. In Fig. 1A, mask 106 remains on substrate 100 after etching. Thickness 110 reflects the original thickness of the substrate prior to etching.

    Fig. 1B shows a substrate edge region 112 after etching. In Fig. 1B, area 114 represents the area where the substrate edge or bevel turns into black silicon post-etch. Black silicon is a rough part of the original substrate that has been eaten away by the etchant. Thickness 120 of Fig. 1B is substantially less than the original thickness of the wafer, substantially increasing the

3127/LAM1F001

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likelihood of bevel collapse. Furthermore, the black silicon area 114 can trap contamination that

may pollute the processing steps in the future.

    To address the bevel collapse problem described above in etching or other type of material removal or punch-through processes, thick protective films or anti-etching sacrificial films at the substrate edge or bevel are used to minimize substrate bevel collapse. Another approach of wafer bevel protection utilizes a process kit known as a shadow ring, which is placed on top of bevel area of the wafer or slightly above the wafer. However, the shadow ring oftentimes introduces tilting and particle issues. Accordingly, this process requires many stages to define the film at the substrate edge. This is problematic especially if the film deposition at the substrate edge or bevel requires separate special equipments.

    It is desirable to provide a bevel deposition to prevent defect formation during semiconductor fabrication process. Previously the baseline oxidation process demonstrated on Coronus and Coronus HP using O2 has major limitation on film thickness (50~200A only) and non-uniformity (film thinning at apex) and insufficient quality to sust...