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Efficient memory clearing for cache-sensitive data

IP.com Disclosure Number: IPCOM000233942D
Publication Date: 2014-Jan-03
Document File: 2 page(s) / 40K

Publishing Venue

The IP.com Prior Art Database


Disclosed is an algorithm for efficient code memory clearing instructions that take into account how cleared data can be used after clearing.

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This is the abbreviated version, containing approximately 52% of the total text.

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Efficient memory clearing for cache-sensitive data

Setting a number of consecutive bytes of memory to zero, also known as memory clearing, is one of the common idioms for many programming languages . A

particular case of interest is the case in which a user wants to clear a large number

(i.e. one or more "pages") of bytes. Some computer architectures provide a number of means to achieve this with various trade-offs. Often, different machine instructions can be used for different sizes of the operation to generate optimal code. Different instructions can also have different side effects on data caches .

A method is needed to effectively use these side effects .

The novel contribution is an algorithm for efficient code memory clearing instructions that take into account how cleared data can be used after clearing . The approach assumes a computer architecture that offers N > 1 unique instruction sequences to clear memory and each sequence brings the memory into a different level of data cache. One example is an architecture with different instruction sequences capable of setting memory to zero with the following properties:

• Memory is cleared by bringing the memory to the data cache closest to the processor prior to clearing

• Memory is cleared in a deeper level of cache without bringing to the cache(s) closer to the processor

Memory may be cleared temporally close to access time (presumably by writing non-zero values to it) or it can be cleared well in advance. When the program requires the memory shortly after the clearing operation, the instruction sequence of type 1 is preferred because the cached data will shortly be used. However, when

cleared memory is not immediately required for operations, a sequence of type 2 can be faster as it does not remove potentially useful data from the close cache to make room for cleared memory. The method can exploit these different characteristics in a number of ways.

The a...