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BACK BIASED FLIP-FLOP TO IMPROVE METASTABILITY RESOLUTION CONSTANT

IP.com Disclosure Number: IPCOM000234045D
Publication Date: 2014-Jan-08
Document File: 4 page(s) / 3M

Publishing Venue

The IP.com Prior Art Database

Abstract

As technology is shrinking, leakage power is an important concern. Back biasing is a prominent technique to reduce leakage power. This paper presents an approach to un-bias the selective part of flip-flop to allow for a gain on the meta-stability resolution constant and at the same time has only a minimal hit on leakage power. An approach for resolution constant calculation also is presented. Experimental data confirms that selective unbiasing enhances the resolution constant with minimal impact on leakage.

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BACK BIASED FLIP-FLOP TO IMPROVE METASTABILITY RESOLUTION CONSTANT

Abstract-- As technology is shrinking, leakage power is an important concern.  Back biasing is a prominent technique to reduce leakage power.  This paper presents an approach to un-bias the selective part of flip-flop to allow for a gain on the meta-stability resolution constant and at the same time has only a minimal hit on leakage power. An approach for resolution constant calculation also is presented. Experimental data confirms that selective unbiasing enhances the resolution constant with minimal impact on leakage.

Keywords— Biasing, Flip-flops, Metastability

I.  Introduction

As the technology is shrinking, the leakage component increases drastically. Most wireless devices are portable, so battery life is an important concern. In order to increase the battery life chip designers are working towards the reduction of overall power consumption of the circuitry. In deep submicron leakage power contributes a significant portion of overall power consumption. In order to reduce the leakage current various techniques are used, among them back biasing [1] is an important technique.  In back biasing, the, voltage difference between source to bulk is increased as a result of which the threshold voltage of the device increases and hence leakage decreases. At the same time, due to increase in the source to bulk voltage the trans-conductance of device also decreases. In combinational circuits due to biasing there is increase in delay. In case of sequential circuits along with delay increase, the meta-stability resolution constant also increases because of the trans-conductance decreases.  The meta-stability in sequential circuit is a phenomenon when the input data doesn’t meet the setup or the hold requirements, the output of the flop can go into undetermined state. To come out from the undetermined state to a well defined logical value it takes some time, which is directly proportional to resolution constant. Resolution constant is a technology dependent parameter which is expected to proportionally decrease with the technology. But the trend is not true for the lower technology nodes. The focus on to limit the resolution constant is so important because as we advancing in the VLSI industry the performance and power are two important aspects. In case of flip-flops if we operate at high frequency the MTBF (mean time between failures) [3] [4] decreases and hence system will fail frequently. For the highly reliable system MTBF should be very high hence it is very important to limit the resolution constant.

  The paper is organized as follows: In section II, we describe the mathematical approach to calculate the resolution constant. In section III, we discuss the impact of biasing on resolution constant. In sections IV, we discuss the impact of back biasing in different technologies. In section V, a proposed solution is presented that explains the selective back biasing techniq...