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Method and System for Providing a Fail-Safe One Shot for a Power Cycle Function

IP.com Disclosure Number: IPCOM000234869D
Publication Date: 2014-Feb-11
Document File: 2 page(s) / 119K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for providing a fail-safe one shot for a power cycle function.

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Method and System for Providing a Fail-Safe One Shot for a Power Cycle Function

For high availability systems, a fault tolerant method to power cycle the systems is required. For example, if a system requires data to be backed up before power supply is stopped, any circuits related to switching the power off is required to fail in a manner that cannot cause inadvertent switching off. Currently, a one shot used to hold the system power off during a full power cycle is susceptible to faults which can make the system turn off unexpectedly.

Disclosed is a method and system for providing a fail-safe one shot for a power cycle function. The method and system provides the fail-safe one shot which can be used as a power cycle controller. The power cycle controller does not result in turning the system off due to failure of any component of the system. The fail-safe one shot starts with two complementary inputs. The fail-safe one shot protects the system from a false trip. The false trip can occur when all outputs of logic chip driving signals to a circuit from either failing all high or all low. The false trip generally occurs when a power converter goes over voltage or under voltage.

One implementation of the method and system is illustrated as a circuit shown in the figure.

Figure

When a signal labeled ONE_SHOT_PS_KILL_ENABLE is high, power supplies are turned off. When the FPGA_ONESHOT_KILL_PRECHG signal is driven high, Q5 is turned on. Thereafter, Q6 is turned on an...