Browse Prior Art Database

System Real-time Analysis and Adaptation

IP.com Disclosure Number: IPCOM000235435D
Publication Date: 2014-Feb-27
Document File: 5 page(s) / 113K

Publishing Venue

The IP.com Prior Art Database

Abstract

When a field service engineer deal with customer service cases, the environments are usually restricted to get required information due to customers' security policies. Sometimes, when the system hangs, the OS information will get lost due to the system being not responsive anymore. In summary, the current design of system analysis mechanism lacks of a detailed real-time host side information, thus is hard to reproduce or analyze the bug. Disclosed is a system real-time analysis and adaptation mechanism based on the current-art BMC design and OS architecture without much additional hardware cost. The field service engineers could adopt different strategies based on different customer security policies, and then get system information and adapt the system accordingly. This will reduce much service time especially for cases which are difficult to reproduce or debug.

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System Real-time Analysis and Adaptation

   Nowadays, we encounter more and more customer defects need OS information to assist debugging. When system crash or hung, the useful system information will lose or incomplete. While this defect is hard to reproduce or customer security policy, it is nearly impossible to find out the preliminary analysis. In some case, it even needs system runtime information to identify system problem. Current design of system analysis mechanism lacks of detail real-time host side information that could be accessible from system administer and thus hard to reproduce or analyze the bug.

   Due to current software and hardware debug tool limitation, we proposed a new invention of system real-time analysis and adaption mechanism based on and extend the current-art BMC and OS architecture without much additional hardware cost. Via this idea, this could reduce service cost and effort, and figure out the system potential issue as soon as possible.

   Currently, the interaction between OS and BMC is too low. To optimize our system usage, we want to use BMC to do more things, not only information collection but also assist OS management. We leverage the current BMC design, based on predefined transparent level to transfer corresponding OS log and status to BMC. There is an analyzer on BMC to detect system potential problem and notify OS for attention and perform corresponding activities. We also allow flexibility to add additional hardware to do more function, not only via BMC. Fig. 1 shows that our inventory of system hardware architecture. Orange part stands for the design we add, and blue is the currently system already have. It is better to add a high speed bus between BMC and system for high speed and massive data transmission. We could also add additional device such as PCI card to do more functionality.

Fig. 1 System Hardware Architecture

   Currently, the interaction between OS and BMC is too low. To optimize our system usage, we want to use BMC to do more things, not only information collection but also assist OS management. We leverage the current BMC design,

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based on predefined transparent level to transfer corresponding OS log and status to BMC. There is an analyzer on BMC to detect system potential problem and notify OS for attention and perform corresponding activities. We also allow flexibility to add additional hardware to do more function, not only via BMC.

   To achieve this inventory, we still need to extend the current Operating System design. We could add additional host software to get more system information and secure the transmit data between BMC. And...