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Functional Tests Coverage Indicators

IP.com Disclosure Number: IPCOM000235664D
Publication Date: 2014-Mar-19
Document File: 2 page(s) / 89K

Publishing Venue

The IP.com Prior Art Database

Abstract

Building a set of functional tests coverage indicators based on product caracteristics and generating data allowing to focus on misses

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FUNCTIONAL TESTS COVERAGE INDICATORS - 2011-2014

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Functional Tests Coverage Indicators

 Abstract-Building a set of functional tests coverage indicators based on product caracteristics and generating data allowing to focus on misses.

 Keywords-test, functional, coverage, indicator, temperature, manufacturing, screening, acceptance


I. INTRODUCTION

THIS paper is aimed at describing a test coverage analysis process for electronic equipments ; based on product

functional features ; at identifying corresponding tests steps for each functional feature and at consolidating the resulting data on several axis (features, component or component type). Subsequent data will be used to improve the product test strategy against relevant indicators (coverage misses, late test or over-test for instance).


A. Warning

 The proposed analysis methodology is not intented to stand in place of any functional safety analysis and does not use any "failure rate" figures. The analysis is aimed at giving a mass production pre-delivery product issue classifying tool, based on feature design.

March 17, 2014


II. FUNCTIONAL ANALYSIS


A. Assumptions

 The design data set shall be composed of requirement doc- uments, detailed design specifications (including hierarchical schematics), test plans and associated test results each of them having a specific level of details. A product is known to be composed of several modules, the analysis is centered at the module level.


B. Criteria

 The backbone of the analysis is based on the listing of module caracteristics, the final list is entended to be short (regarding the amount of module level requirements). Each item of this listing will be called a "main caracteristics - MC". Each MC shall have an associated sanction (measurement level, bandwidth, self test result ...). The sanction is determined by the detailed design specification and not by any high level requirement. It is believed that manufacturing level sanctions shall be as close as possible to the hardware implementation in order to ensure a proper level of misfunction detection.

C. Main caracteristics determination
As stated above MC determination is the very first step of

the process. MCs shall be seen as something slightly deeper than a functional feature. For instance a memory plan could be summarized as being fed correctly by the power supply (ie no power supply failure due to memory plan failure) and allowing carrefuly selected bus accesses from an external master (as far as possible accesses will be selected so that they use slighlty different physical characteristics : control signals, frequencies, bus width, ...).

The MCs for a standard memory plan could be :


Input Voltage within design constraints (memory datasheet + power supply tree implementation)


Ability to serve Single Read Write accesses from master (bus oriented)


Ability to serve Burst Read and/or Write accesses from master (bus oriented)


Ability to serve access to the whole data plan (com...