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Method and System for Preserving Register Content across Virtualized Central Processing Unit Dispatches

IP.com Disclosure Number: IPCOM000236310D
Publication Date: 2014-Apr-18
Document File: 5 page(s) / 82K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for preserving register content during dispatch across one or more virtualized central processing units (CPUs).

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Method and System for Preserving Register Content across Virtualized Central Processing Unit Dispatches

Virtual central processing units (CPUs) that are managed by a hypervisor require a large amount of processor state to be managed. The processor state includes information such as, but not limited to, a current instruction address, contents of control registers and status registers and contents of general registers, floating point registers (FPR), and vector registers (VR). As the processor state of one or more vector

registers increases in size due to addition of wider registers, an amount of data that needs to be loaded into a virtual CPU state and saved when the virtual CPU is undispatched has increased greatly.

Thus, an increase in amount of virtual CPU state can slow down the starting of a virtual central processing unit (CPU) thereby reducing overall throughput of a physical CPU. Often, when the virtual CPU returns to the hypervisor, the hypervisor only needs to do a quick simulation of one or more functions before restoring the virtual CPU state.

If the hypervisor does not alter the state of any of a set of registers, the set of registers do not have to be reloaded back into the virtual CPU on dispatch of the virtual CPU. When the virtual CPU has to return back to the hypervisor, the system firmware or the hypervisor itself has to preserve the state of the virtual CPU. If the hardware is able to keep the register state of the virtual CPU through an exit back to the hypervisor or system firmware, the system firmware can then pass data pertaining to the register state on to the hypervisor if necessary. If the hypervisor does not modify the register state, the hypervisor does not need to save or restore a portion of a guest register state.

A control is also provided for the hypervisor to signal system firmware that is not

necessary to reload the guest register state if the hardware still contains the register state for the virtual CPU.

Disclosed is a method and system for preserving register content during dispatch across one or more virtualized CPUs.

In an embodiment, the method and system utilizes Register Retain Status (RRS) functionality of start virtual execution (start-VE) instruction. In accordance with the embodiment, the method and system utilizes a satellite block of storage with a po...