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A self-overvoltage-protection circuit for USB PHY

IP.com Disclosure Number: IPCOM000236559D
Publication Date: 2014-May-02
Document File: 3 page(s) / 135K

Publishing Venue

The IP.com Prior Art Database

Abstract

An overvoltage protection circuit is presented in this paper, which can protect 3.3V USB driver transistor from damaged by over-voltage on DP/DM ports. The proposed overvoltage protection circuit just adds an over-voltage sense circuit and uses inherent NMOS driver transistor of USB transmitter to limit the voltage on the drain of USB driver transistors when USB DP/DM ports endure high voltage stress, therefore it costs less extra silicon area and almost doesn’t interfere with the design of USB transmitter circuit for normal operation.

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A self-overvoltage-protection circuit for USB PHY

Abstract – An overvoltage protection circuit is presented in this paper, which can protect 3.3V USB driver transistor from damaged by over-voltage on DP/DM ports. The proposed overvoltage protection circuit just adds an over-voltage sense circuit and uses inherent NMOS driver transistor of USB transmitter to limit the voltage on the drain of USB driver transistors when USB DP/DM ports endure high voltage stress, therefore it costs less extra silicon area and almost doesn’t interfere with the design of USB transmitter circuit for normal operation.

Body

•          What problem does the proposed circuit solve 

On request of USB specification, USB ports must be capable of withstanding AC stress condition as shown in Fig. 3, The proposed circuit can provide overvoltage protection for the internal 3.3V transistors of USB transmitter when USB DP/DM ports endure high voltage stress under the case of overshoot or AC stress condition. It costs less silicon area compared to the existing overvoltage protection methods [1] [2] and it almost doesn’t interfere with the design of USB transmitter circuit for normal operation.

Fig.3

•          What is the solution of the proposed circuit

The proposed circuit is shown in Figs. 2 and 3. Fig. 2 is an over-voltage sense circuit which detects the over-voltage condition on the usb DP/DM pads;  Fig. 1 is the usb full speed driver.  The over-voltage sense circuit detects the over-voltage condition on the usb DP/DM  pads, When DP/DM pads are enduring overvoltage stress, MP_DVR is disconnected from pre-driver(Pre_Driver_P) and disabled with SW2 off and SW4 on, in the mean time, SW1 turns on and SW3 turns off, the gate of NMOS driver MN_DRV is disconnected from pre-driver(Pre_Driver_N) and biased at the voltage level of node ngate_trig_bias which makes MN_DRV conduct and draw the right amount of current from  the data bus such that the excess voltage is dropped across the 45Ohm terminal resistor as well as external resistor at  AC stress evaluation setup condition, thus limiting the voltage on the drain of MP_DVR&MN_DVR and the pad DP/DM. When in normal operating condition, the gates of MP_DVR & MN_DVR are driven by pre-driver.

•          How does the proposed circuit work

As s...