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Method for Fail Safe Hardware Reset Configuration

IP.com Disclosure Number: IPCOM000236656D
Publication Date: 2014-May-07
Document File: 3 page(s) / 83K

Publishing Venue

The IP.com Prior Art Database

Abstract

Complex configurable processors use external pins and non volatile memories to store boot configuration data (BCD) (boot source, Phased Lock Loop (PLL) values, pin multiplexing etc.). If the non volatile memory is not programmed, has been erased or is corrupted, it can cause the device to not operate correctly leading to an unusable board.

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Method for Fail Safe Hardware Reset Configuration

Abstract

Complex configurable processors use external pins and non volatile memories to store boot configuration data (BCD) (boot source, Phased Lock Loop (PLL) values, pin multiplexing etc.). If the non volatile memory is not programmed, has been erased or is corrupted, it can cause the device to not operate correctly leading to an unusable board.

Introduction

Complex configurable processors use external pins and non volatile memories to store boot configuration data (BCD) (e.g. boot source, PLL values, pin muxing etc.). One issue with this method of obtaining the boot data is that the external device must be programmed first. Additionally a blank/erased EEPROM (Electrically Erased Programmable Memory) or NOR/NAND flash device typically is programmed with all ones. This leads to invalid configuration options for the processor such as PLL multiplication values that result in the PLLs not locking or the device not exiting reset.

In such cases you cannot access the device through JTAG (Joint Test Access Group) to allow programming of the non-volatile device. Additionally if only the BCD is incorrect but the rest of the flash content (e.g. u-boot) is valid, the incorrect BCD prevents correct execution of the program code where it may be desirable for it to continue. From a end user perspective it is a dead board without access to expert tools.

Design and Implementation

The proposed method uses a Default BCD to force the processor into a safe and correct operating mode that only provides the minimum initialization neces...