Browse Prior Art Database

A Method and System for Achieving a Uniform Threshold Voltage in Nanowire Transistors

IP.com Disclosure Number: IPCOM000237062D
Publication Date: 2014-May-29
Document File: 4 page(s) / 97K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method and system for achieving a uniform threshold voltage in nanowire transistors.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 52% of the total text.

Page 01 of 4

A Method and System for Achieving a Uniform Threshold Voltage in Nanowire Transistors
Disclosed is a method and system for achieving a uniform threshold voltage in nanowire transistors. The method and system performs nanowire Field Effect Transistor (FET) fabrication to achieve uniform threshold voltage Vt across multiple stacks through implants compensation.

The method and system demonstrates a promising structure and a systematic way to achieve uniformity across stacks of nanowire transistor within a same stack.

Fig. 1 illustrates a process chart of executing method steps.

Figure 1

As shown in fig. 1, initially a target threshold voltage Vt is determined for a technology. In second step, well implants dose or energy is simulated and a corresponding profile is obtained as illustrated in fig. 2.

1


Page 02 of 4

Figure 2

As shown in fig. 2, the arrow indicates the profile for epitaxial (epi) substrate for in-situ doping.

In third step of the process chart, a well compensation condition is simulated and a target profile is obtained as shown in fig. 3.

Figure 3

As shown in fig. 3, the arrow indicates a doping profile implanted using Vt. In third step, corresponding implants conditions are obtained through ion implants process simulation to match the target Vt. Here, the doping profile varies through the stacks of the nanowire depending on the nature of the ion implants process. Thereafter, the doping profile across nanowire stacks is recorded.

In fourth step of the process chart, a nanowire Silicon (Si) or Silicon Germanium (SiGe) substrate is produced by doped epi process with a dosage compensation. The dosage compensation across the nanowire stacks is again calculated or simulated using process simulation. Here, when the dosage compensation is combined toge...