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Method and System for Providing Improved 3-Dimensional (3D) Packaging using Silicon Frame Interposer

IP.com Disclosure Number: IPCOM000237063D
Publication Date: 2014-May-29
Document File: 2 page(s) / 79K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for providing improved 3-dimensional (3D) packaging using Silicon Frame Interposer.

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Method and System for Providing Improved 3-Dimensional (3D) Packaging using Silicon Frame Interposer

Disclosed is a method and system for providing improved 3-dimensional (3D) packaging using silicon frame interposer. The method and system utilizes silicon frame interposer for providing 3D packaging with complex high density structure by allowing cavities between top and bottom dies of 3D constructs. Silicon frame interposer also provides high I/O densities to the 3D constructs at potentially less processing time and cheaper cost.

In accordance with the method and system, as shown in the figure 1, silicon (Si) frame interposer is arranged between top and bottom dies while a 3D construct is in process. Placement of silicon frame interposer between the dies provides cavities with high I/O densities resulting in complex high density 3D structures.

Figure 1

As illustrated in the figure 2, the method and system also utilizes multiple Through-Silicon Via(s) (TSV) around middle dies of the 3D constructs. Placement of multiple TSV(s) around middle dies provides a strong vertical electrical connection between bottom and top dies passing completely through the middle dies.

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Figure 2

Advantageously, 3D packaging using silicon frame interposer can provide improved performance and form factor by stacking multiple dies on top of each other with multiple cavities.

Thus, the method and system provides improved 3-dimensional (3d) packaging using silicon frame inter...