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A Method and System for Improving Power Efficiency by Throttling branch Prediction Search Rate based on Queue Occupancy

IP.com Disclosure Number: IPCOM000237562D
Publication Date: 2014-Jun-24
Document File: 3 page(s) / 101K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for improving power efficiency by throttling branch prediction search rate based on queue occupancy.

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A Method and System for Improving Power Efficiency by Throttling branch Prediction Search Rate based on Queue Occupancy

Disclosed is a method and system for improving power efficiency by throttling branch prediction search rate based on queue occupancy.

The method and system throttles the branch prediction search rate based on occupancy of branch prediction queues which contain valid entries. If the branch prediction queues contain valid entries above a certain threshold, then the branch prediction search rate is slowed down to save power by avoiding searching during some cycles. In a scenario, when few branch predictions are already performed and the

prediction is on a correct path, then full power is used to search for branches in every cycle. Here, the branches are searched with full power in order to proceed and quickly initiate instruction fetches for branch targets. After proceeding and searching branch

targets for some time, subsequent branch predictions are less likely to be on a correct path, and the search rate is slowed down to reduce power consumption.

The method and system utilizes an asynchronous branch predictor that contains one or more structures used to predict a branch address, a direction, and target addresses of branch instructions. One such structure is a Branch Target Buffer (BTB) as illustrated in fig. 1.

Figure 1

The BTB is indexed with instruction addresses and is a multi-way set associative cache

of branch prediction information. Here, each entry represents a branch instruction that contains a valid bit and branch instruction address tag bits. Additionally, each entry represents a branch history state such as a two bit bimodal Branch History Table (BHT) predictor, a predicted target address and other branch prediction states.

In a scenario, additional branch prediction structures such as a Pattern History Table (PHT) or Multiple Target Table (MTT) are searched in parallel with the BTB.

Fig. 2 illustrates the BTB with the asynchronous lookahead branch predictor with power throttling.

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Figure 2

When a processor is restarted, a restart indication and restart instruction address are sent to an instruction fetching logic and a branch prediction search control logic. A

branch prediction search process is then initiated and the BTB based on a restart address is accessed. As shown in fig. 2, the Hit Detect Logic (HDL) examines the BTB entries that are read and makes predictions for branches during or after the search address. If the HDL finds a predicted taken branch, then the search process is re-indexed with a predicted target address. Otherwise the search process continues sequentially in a pipelined manner. If the HDL determines one or more branches that

were not taken, then the search process is either re-indexed sequentially upon making the prediction, or is configured...