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Dynamic, adaptive resolution for performance instrumentation

IP.com Disclosure Number: IPCOM000237621D
Publication Date: 2014-Jun-27
Document File: 4 page(s) / 76K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method for dynamic, adaptive resolution for performance instrumentation is disclosed.

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This is the abbreviated version, containing approximately 42% of the total text.

Page 01 of 4

Dynamic, adaptive resolution for performance instrumentation

Disclosed is a method for dynamic, adaptive resolution for performance instrumentation by partitioning/packing the counter with counts that are specific to each system configuration.

Most commercial server systems are instrumented with performance counters that track run-time performance characteristics, such as throughput, memory bandwidth, utilization, and many more. Performance event counters have been employed in computing systems for over 20 years.

Instrumentation logic includes hundreds of event types, though silicon area and complexity constraints limit the function to track only a small number of events at one time. Users select a group of events to monitor, and dedicated logic for each of the selected events monitors relevant signals and accumulates the result into an entry in an array of hardware registers. The width of the performance counters' registers determines how many bits of information may be stored without loss. For example, a 16 bit register can hold values from 0 through 2(power16) - 1. When a register has reached its maximum value, it typically generates an alert with an interrupt and program execution is paused until the counter value has been read, and the interrupt cleared.

The Hardware counter may hold a common event during one monitoring session and a rare event the next session. Programmable pre-scalars adjust the resolution to match the resolution of measurement to expected values, as much as possible. Events expected to have large values can be shifted toward the most-significant bit, losing resolution in exchange for tracking larger numbers.

A critical feature of performance counters is comparing the value in the counter against an expected reference value, for diagnosing performance bottlenecks. However, with dynamic reconfiguration due to power management and other run-time control units, the reference point itself is variable. In the current state of the art, performance data is collected regardless of configuration, which loses valuable context for reference values. For example, low bandwidth due to restricted lane width is indistinguishable from low bandwidth due to contention.

The counter-packing method proceeds as follows.

This legacy approach is designed to track performance as programs execute on fixed hardware. However, in recent computing system generations, aggressive performance and power management have added another dimension of variability, hardware feature availability. For example, one or more cores within a multi-core processor and one or more wires within a communication bus network may be turned on and off dynamically to manage power consumption. The processor core clock frequencies and Power Bus (inter-core/intra-chip communication paths) command rates, and memory throttle rates may also be adjusted dynamically. In current computing generations, the available hardware resources, and thus the peak performance and 'cei...